* Authors: Gabe Black
*/
-#include "arch/x86/isa_traits.hh"
#include "arch/x86/nativetrace.hh"
+
+#include "arch/x86/isa_traits.hh"
#include "arch/x86/regs/float.hh"
#include "arch/x86/regs/int.hh"
#include "cpu/thread_context.hh"
+#include "debug/ExecRegDelta.hh"
#include "params/X86NativeTrace.hh"
+#include "sim/byteswap.hh"
namespace Trace {
X86NativeTrace::ThreadState::update(NativeTrace *parent)
{
parent->read(this, sizeof(*this));
- rax = X86ISA::gtoh(rax);
- rcx = X86ISA::gtoh(rcx);
- rdx = X86ISA::gtoh(rdx);
- rbx = X86ISA::gtoh(rbx);
- rsp = X86ISA::gtoh(rsp);
- rbp = X86ISA::gtoh(rbp);
- rsi = X86ISA::gtoh(rsi);
- rdi = X86ISA::gtoh(rdi);
- r8 = X86ISA::gtoh(r8);
- r9 = X86ISA::gtoh(r9);
- r10 = X86ISA::gtoh(r10);
- r11 = X86ISA::gtoh(r11);
- r12 = X86ISA::gtoh(r12);
- r13 = X86ISA::gtoh(r13);
- r14 = X86ISA::gtoh(r14);
- r15 = X86ISA::gtoh(r15);
- rip = X86ISA::gtoh(rip);
+ rax = letoh(rax);
+ rcx = letoh(rcx);
+ rdx = letoh(rdx);
+ rbx = letoh(rbx);
+ rsp = letoh(rsp);
+ rbp = letoh(rbp);
+ rsi = letoh(rsi);
+ rdi = letoh(rdi);
+ r8 = letoh(r8);
+ r9 = letoh(r9);
+ r10 = letoh(r10);
+ r11 = letoh(r11);
+ r12 = letoh(r12);
+ r13 = letoh(r13);
+ r14 = letoh(r14);
+ r15 = letoh(r15);
+ rip = letoh(rip);
//This should be expanded if x87 registers are considered
for (int i = 0; i < 8; i++)
- mmx[i] = X86ISA::gtoh(mmx[i]);
+ mmx[i] = letoh(mmx[i]);
for (int i = 0; i < 32; i++)
- xmm[i] = X86ISA::gtoh(xmm[i]);
+ xmm[i] = letoh(xmm[i]);
}
void
r13 = tc->readIntReg(X86ISA::INTREG_R13);
r14 = tc->readIntReg(X86ISA::INTREG_R14);
r15 = tc->readIntReg(X86ISA::INTREG_R15);
- rip = tc->readNextPC();
+ rip = tc->pcState().npc();
//This should be expanded if x87 registers are considered
for (int i = 0; i < 8; i++)
- mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i));
+ mmx[i] = tc->readFloatReg(X86ISA::FLOATREG_MMX(i));
for (int i = 0; i < 32; i++)
- xmm[i] = tc->readFloatRegBits(X86ISA::FLOATREG_XMM_BASE + i);
+ xmm[i] = tc->readFloatReg(X86ISA::FLOATREG_XMM_BASE + i);
}
bool
X86NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
{
- if(!checkRcx)
+ if (!checkRcx)
checkRcx = (mVal != oldRcxVal || nVal != oldRealRcxVal);
- if(checkRcx)
+ if (checkRcx)
return checkReg(name, mVal, nVal);
return true;
}
bool
X86NativeTrace::checkR11Reg(const char * name, uint64_t &mVal, uint64_t &nVal)
{
- if(!checkR11)
+ if (!checkR11)
checkR11 = (mVal != oldR11Val || nVal != oldRealR11Val);
- if(checkR11)
+ if (checkR11)
return checkReg(name, mVal, nVal);
return true;
}
nState.update(this);
mState.update(record->getThread());
- if(record->getStaticInst()->isSyscall())
+ if (record->getStaticInst()->isSyscall())
{
checkRcx = false;
checkR11 = false;
checkXMM(15, mState.xmm, nState.xmm);
}
-} /* namespace Trace */
+} // namespace Trace
////////////////////////////////////////////////////////////////////////
//
X86NativeTraceParams::create()
{
return new Trace::X86NativeTrace(this);
-};
+}