* Authors: Gabe Black
*/
-#include "arch/x86/isa_traits.hh"
-#include "arch/x86/nativetrace.hh"
#include "arch/x86/regs/float.hh"
#include "arch/x86/regs/int.hh"
+#include "arch/x86/isa_traits.hh"
+#include "arch/x86/nativetrace.hh"
#include "cpu/thread_context.hh"
+#include "debug/ExecRegDelta.hh"
#include "params/X86NativeTrace.hh"
#include "sim/byteswap.hh"
r13 = tc->readIntReg(X86ISA::INTREG_R13);
r14 = tc->readIntReg(X86ISA::INTREG_R14);
r15 = tc->readIntReg(X86ISA::INTREG_R15);
- rip = tc->pcState().pc();
+ rip = tc->pcState().npc();
//This should be expanded if x87 registers are considered
for (int i = 0; i < 8; i++)
mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i));
bool
X86NativeTrace::checkRcxReg(const char * name, uint64_t &mVal, uint64_t &nVal)
{
- if(!checkRcx)
+ if (!checkRcx)
checkRcx = (mVal != oldRcxVal || nVal != oldRealRcxVal);
- if(checkRcx)
+ if (checkRcx)
return checkReg(name, mVal, nVal);
return true;
}
bool
X86NativeTrace::checkR11Reg(const char * name, uint64_t &mVal, uint64_t &nVal)
{
- if(!checkR11)
+ if (!checkR11)
checkR11 = (mVal != oldR11Val || nVal != oldRealR11Val);
- if(checkR11)
+ if (checkR11)
return checkReg(name, mVal, nVal);
return true;
}
nState.update(this);
mState.update(record->getThread());
- if(record->getStaticInst()->isSyscall())
+ if (record->getStaticInst()->isSyscall())
{
checkRcx = false;
checkR11 = false;
X86NativeTraceParams::create()
{
return new Trace::X86NativeTrace(this);
-};
+}