mem-cache: Add multiple eviction stats

[gem5.git] / src / arch / x86 / pseudo_inst.cc

diff --git a/src/arch/x86/pseudo_inst.cc b/src/arch/x86/pseudo_inst.cc
index bd3b5ac7cf538fe96a2eafa35af18e3c4f44e06e..95d8ab8f8105286ef6effbae98ce6625dd327bc6 100644 (file)
--- a/src/arch/x86/pseudo_inst.cc
+++ b/src/arch/x86/pseudo_inst.cc
@@ -29,28 +29,17 @@
  */
 
 #include "arch/x86/pseudo_inst.hh"
+
+#include "arch/x86/system.hh"
+#include "cpu/thread_context.hh"
 #include "debug/PseudoInst.hh"
+#include "mem/se_translating_port_proxy.hh"
 #include "sim/process.hh"
 
 using namespace X86ISA;
 
 namespace X86ISA {
 
-/*
- * This function is executed when the simulation is executing the syscall
- * handler in System Emulation mode.
- */
-void
-m5Syscall(ThreadContext *tc)
-{
-    DPRINTF(PseudoInst, "PseudoInst::m5Syscall()\n");
-
-    tc->syscall(tc->readIntReg(INTREG_RAX));
-    MiscReg rflags = tc->readMiscReg(MISCREG_RFLAGS);
-    rflags &= ~(1 << 16);
-    tc->setMiscReg(MISCREG_RFLAGS, rflags);
-}
-
 /*
  * This function is executed when the simulation is executing the pagefault
  * handler in System Emulation mode.
@@ -62,8 +51,23 @@ m5PageFault(ThreadContext *tc)
 
     Process *p = tc->getProcessPtr();
     if (!p->fixupStackFault(tc->readMiscReg(MISCREG_CR2))) {
-        panic("Page fault at %#x ", tc->readMiscReg(MISCREG_CR2));
-    }
+        PortProxy &proxy = tc->getVirtProxy();
+        // at this point we should have 6 values on the interrupt stack
+        int size = 6;
+        uint64_t is[size];
+        // reading the interrupt handler stack
+        proxy.readBlob(ISTVirtAddr + PageBytes - size * sizeof(uint64_t),
+                       &is, sizeof(is));
+        panic("Page fault at addr %#x\n\tInterrupt handler stack:\n"
+                "\tss: %#x\n"
+                "\trsp: %#x\n"
+                "\trflags: %#x\n"
+                "\tcs: %#x\n"
+                "\trip: %#x\n"
+                "\terr_code: %#x\n",
+                tc->readMiscReg(MISCREG_CR2),
+                is[5], is[4], is[3], is[2], is[1], is[0]);
+   }
 }
 
 } // namespace X86ISA