arm: Clean up and document decoder API

[gem5.git] / src / arch / x86 / tlb.cc

diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index fa226ac5597684c9ae52f4581e81bc4374deec99..dd0aed77092b37bf521256e4f5608a6ae7db9a43 100644 (file)
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -232,15 +232,22 @@ TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const
 {
     Addr paddr = req->getPaddr();
 
-    // Check for an access to the local APIC
-    if (FullSystem) {
+    AddrRange m5opRange(0xFFFF0000, 0xFFFFFFFF);
+
+    if (m5opRange.contains(paddr)) {
+        if (m5opRange.contains(paddr)) {
+            req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR);
+            req->setPaddr(GenericISA::iprAddressPseudoInst(
+                            (paddr >> 8) & 0xFF,
+                            paddr & 0xFF));
+        }
+    } else if (FullSystem) {
+        // Check for an access to the local APIC
         LocalApicBase localApicBase =
             tc->readMiscRegNoEffect(MISCREG_APIC_BASE);
         AddrRange apicRange(localApicBase.base * PageBytes,
                             (localApicBase.base + 1) * PageBytes - 1);
 
-        AddrRange m5opRange(0xFFFF0000, 0xFFFFFFFF);
-
         if (apicRange.contains(paddr)) {
             // The Intel developer's manuals say the below restrictions apply,
             // but the linux kernel, because of a compiler optimization, breaks
@@ -257,11 +264,6 @@ TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const
             req->setFlags(Request::UNCACHEABLE);
             req->setPaddr(x86LocalAPICAddress(tc->contextId(),
                                               paddr - apicRange.start()));
-        } else if (m5opRange.contains(paddr)) {
-            req->setFlags(Request::MMAPPED_IPR | Request::GENERIC_IPR);
-            req->setPaddr(GenericISA::iprAddressPseudoInst(
-                              (paddr >> 8) & 0xFF,
-                              paddr & 0xFF));
         }
     }