arm: Clean up and document decoder API

[gem5.git] / src / arch / x86 / tlb.hh

diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh
index 078b8b8d6de78f9f3a3bc08fc07010ed6667c09a..e1089f90c10391157c4f2da2c448eb5a11b8d487 100644 (file)
--- a/src/arch/x86/tlb.hh
+++ b/src/arch/x86/tlb.hh
@@ -46,10 +46,10 @@
 
 #include "arch/x86/regs/segment.hh"
 #include "arch/x86/pagetable.hh"
+#include "base/trie.hh"
 #include "mem/mem_object.hh"
 #include "mem/request.hh"
 #include "params/X86TLB.hh"
-#include "sim/fault_fwd.hh"
 #include "sim/sim_object.hh"
 #include "sim/tlb.hh"
 
@@ -74,7 +74,7 @@ namespace X86ISA
         typedef X86TLBParams Params;
         TLB(const Params *p);
 
-        void dumpAll();
+        void takeOverFrom(BaseTLB *otlb) {}
 
         TlbEntry *lookup(Addr va, bool update_lru = true);
 
@@ -89,19 +89,21 @@ namespace X86ISA
       public:
         Walker *getWalker();
 
-        void invalidateAll();
+        void flushAll();
 
-        void invalidateNonGlobal();
+        void flushNonGlobal();
 
         void demapPage(Addr va, uint64_t asn);
 
       protected:
-        int size;
+        uint32_t size;
 
         TlbEntry * tlb;
 
         EntryList freeList;
-        EntryList entryList;
+
+        TlbEntryTrie trie;
+        uint64_t lruSeq;
 
         Fault translateInt(RequestPtr req, ThreadContext *tc);
 
@@ -111,6 +113,14 @@ namespace X86ISA
 
       public:
 
+        void evictLRU();
+
+        uint64_t
+        nextSeq()
+        {
+            return ++lruSeq;
+        }
+
         Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
         void translateTiming(RequestPtr req, ThreadContext *tc,
                 Translation *translation, Mode mode);
@@ -119,13 +129,39 @@ namespace X86ISA
          */
         Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
 
+        /**
+         * Do post-translation physical address finalization.
+         *
+         * Some addresses, for example requests going to the APIC,
+         * need post-translation updates. Such physical addresses are
+         * remapped into a "magic" part of the physical address space
+         * by this method.
+         *
+         * @param req Request to updated in-place.
+         * @param tc Thread context that created the request.
+         * @param mode Request type (read/write/execute).
+         * @return A fault on failure, NoFault otherwise.
+         */
+        Fault finalizePhysical(RequestPtr req, ThreadContext *tc,
+                               Mode mode) const;
+
         TlbEntry * insert(Addr vpn, TlbEntry &entry);
 
         // Checkpointing
         virtual void serialize(std::ostream &os);
         virtual void unserialize(Checkpoint *cp, const std::string &section);
 
-        virtual Port * getPort();
+        /**
+         * Get the table walker master port. This is used for
+         * migrating port connections during a CPU takeOverFrom()
+         * call. For architectures that do not have a table walker,
+         * NULL is returned, hence the use of a pointer rather than a
+         * reference. For X86 this method will always return a valid
+         * port pointer.
+         *
+         * @return A pointer to the walker master port
+         */
+        virtual BaseMasterPort *getMasterPort();
     };
 }