x86: Split apart x87's FSW and TOP, and add a missing break.

[gem5.git] / src / arch / x86 / types.cc

diff --git a/src/arch/x86/types.cc b/src/arch/x86/types.cc
index a960205b58fffaf64149cdc589d02883749ce964..6d730604944d46efeec58d6b52b6760190edb9e0 100644 (file)
--- a/src/arch/x86/types.cc
+++ b/src/arch/x86/types.cc
@@ -29,6 +29,7 @@
  */
 
 #include "arch/x86/types.hh"
+
 #include "sim/serialize.hh"
 
 using namespace X86ISA;
@@ -41,6 +42,7 @@ paramOut(CheckpointOut &cp, const string &name, ExtMachInst const &machInst)
     // Prefixes
     paramOut(cp, name + ".legacy", (uint8_t)machInst.legacy);
     paramOut(cp, name + ".rex", (uint8_t)machInst.rex);
+    paramOut(cp, name + ".vex", (uint32_t)machInst.vex);
 
     // Opcode
     paramOut(cp, name + ".opcode.type", (uint8_t)machInst.opcode.type);
@@ -75,6 +77,10 @@ paramIn(CheckpointIn &cp, const string &name, ExtMachInst &machInst)
     paramIn(cp, name + ".rex", temp8);
     machInst.rex = temp8;
 
+    uint32_t temp32;
+    paramIn(cp, name + ".vex", temp32);
+    machInst.vex = temp32;
+
     // Opcode
     paramIn(cp, name + ".opcode.type", temp8);
     machInst.opcode.type = (OpcodeType)temp8;