hsail: Fix disassembly of load instruction with 3 destination operands

[gem5.git] / src / arch / x86 / vtophys.cc

diff --git a/src/arch/x86/vtophys.cc b/src/arch/x86/vtophys.cc
index e4abfca59302cc12d5b46dda79ee2da1ddcc9381..4bbeb7119a77a3590f5373f98b2c892389624416 100644 (file)
--- a/src/arch/x86/vtophys.cc
+++ b/src/arch/x86/vtophys.cc
@@ -45,7 +45,6 @@
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "debug/VtoPhys.hh"
-#include "sim/fault_fwd.hh"
 
 using namespace std;
 
@@ -61,12 +60,13 @@ namespace X86ISA
     vtophys(ThreadContext *tc, Addr vaddr)
     {
         Walker *walker = tc->getDTBPtr()->getWalker();
-        Addr size;
+        unsigned logBytes;
         Addr addr = vaddr;
-        Fault fault = walker->startFunctional(tc, addr, size, BaseTLB::Read);
+        Fault fault = walker->startFunctional(
+                tc, addr, logBytes, BaseTLB::Read);
         if (fault != NoFault)
             panic("vtophys page walk returned fault\n");
-        Addr masked_addr = vaddr & (size - 1);
+        Addr masked_addr = vaddr & mask(logBytes);
         Addr paddr = addr | masked_addr;
         DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
         return paddr;