mem-cache: Add multiple eviction stats

[gem5.git] / src / arch / x86 / x86_traits.hh

diff --git a/src/arch/x86/x86_traits.hh b/src/arch/x86/x86_traits.hh
index a94d806ef8530b1182d6f4b4de09b441d036b16f..6f1c9ae366796956e5258ad8ce5c582f5229dbf2 100644 (file)
--- a/src/arch/x86/x86_traits.hh
+++ b/src/arch/x86/x86_traits.hh
@@ -40,15 +40,12 @@
 
 #include <cassert>
 
-#include "arch/x86/types.hh"
 #include "base/types.hh"
 
 namespace X86ISA
 {
     const int NumMicroIntRegs = 16;
 
-    const int NumPseudoIntRegs = 4;
-    //1. The condition code bits of the rflags register.
     const int NumImplicitIntRegs = 6;
     //1. The lower part of the result of multiplication.
     //2. The upper part of the result of multiplication.
@@ -105,18 +102,6 @@ namespace X86ISA
         assert(addr < PhysAddrAPICRangeSize);
         return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr;
     }
-
-    const ExtMachInst NoopMachInst = {
-        0x0,                            // No legacy prefixes.
-        0x0,                            // No rex prefix.
-        { 1, 0x0, 0x0, 0x90 },          // One opcode byte, 0x90.
-        0x0, 0x0,                       // No modrm or sib.
-        0, 0,                           // No immediate or displacement.
-        8, 8, 8,                        // All sizes are 8.
-        0,                              // Displacement size is 0.
-        SixtyFourBitMode                // Behave as if we're in 64 bit
-                                        // mode (this doesn't actually matter).
-    };
 }
 
 #endif //__ARCH_X86_X86TRAITS_HH__