v3d: Switch implicit uniforms over to being any qinst->uniform != ~0.

[mesa.git] / src / broadcom / compiler / qpu_validate.c

diff --git a/src/broadcom/compiler/qpu_validate.c b/src/broadcom/compiler/qpu_validate.c
index 492f2e64d09ba0b790ac479ffb0f9a252dd3182a..fb2ed123aba3aee228a80fed8589e2d27366b9d0 100644 (file)
--- a/src/broadcom/compiler/qpu_validate.c
+++ b/src/broadcom/compiler/qpu_validate.c
@@ -124,6 +124,19 @@ qpu_validate_inst(struct v3d_qpu_validate_state *state, struct qinst *qinst)
                 fail_instr(state, "LDUNIF after a LDVARY");
         }
 
+        /* GFXH-1633 */
+        bool last_reads_ldunif = (state->last && (state->last->sig.ldunif ||
+                                                  state->last->sig.ldunifrf));
+        bool last_reads_ldunifa = (state->last && (state->last->sig.ldunifa ||
+                                                   state->last->sig.ldunifarf));
+        bool reads_ldunif = inst->sig.ldunif || inst->sig.ldunifrf;
+        bool reads_ldunifa = inst->sig.ldunifa || inst->sig.ldunifarf;
+        if ((last_reads_ldunif && reads_ldunifa) ||
+            (last_reads_ldunifa && reads_ldunif)) {
+                fail_instr(state,
+                           "LDUNIF and LDUNIFA can't be next to each other");
+        }
+
         int tmu_writes = 0;
         int sfu_writes = 0;
         int vpm_writes = 0;
@@ -247,6 +260,11 @@ qpu_validate_inst(struct v3d_qpu_validate_state *state, struct qinst *qinst)
 
                 if (v3d_qpu_sig_writes_address(devinfo, &inst->sig))
                         fail_instr(state, "RF write after THREND");
+
+                /* GFXH-1625: No TMUWT in the last instruction */
+                if (state->last_thrsw_ip - state->ip == 2 &&
+                    inst->alu.add.op == V3D_QPU_A_TMUWT)
+                        fail_instr(state, "TMUWT in last instruction");
         }
 
         if (inst->type == V3D_QPU_INSTR_TYPE_BRANCH) {