v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr))));
}
+bool
+v3d_qpu_writes_tmu_not_tmuc(const struct v3d_qpu_instr *inst)
+{
+ return v3d_qpu_writes_tmu(inst) &&
+ (!inst->alu.add.magic_write ||
+ inst->alu.add.waddr != V3D_QPU_WADDR_TMUC) &&
+ (!inst->alu.mul.magic_write ||
+ inst->alu.mul.waddr != V3D_QPU_WADDR_TMUC);
+}
+
bool
v3d_qpu_reads_vpm(const struct v3d_qpu_instr *inst)
{
v3d_qpu_writes_r4(const struct v3d_device_info *devinfo,
const struct v3d_qpu_instr *inst)
{
- if (inst->sig.ldtmu)
- return true;
-
if (inst->type == V3D_QPU_INSTR_TYPE_ALU) {
if (inst->alu.add.magic_write &&
(inst->alu.add.waddr == V3D_QPU_WADDR_R4 ||
}
}
- if (v3d_qpu_sig_writes_address(devinfo, &inst->sig) &&
- inst->sig_magic && inst->sig_addr == V3D_QPU_WADDR_R4) {
+ if (v3d_qpu_sig_writes_address(devinfo, &inst->sig)) {
+ if (inst->sig_magic && inst->sig_addr == V3D_QPU_WADDR_R4)
+ return true;
+ } else if (inst->sig.ldtmu) {
return true;
}