#define NIR_BUILDER_H
#include "nir_control_flow.h"
+#include "util/half_float.h"
struct exec_list;
return &load_const->def;
}
+static inline nir_ssa_def *
+nir_imm_bool(nir_builder *build, bool x)
+{
+ nir_const_value v;
+
+ memset(&v, 0, sizeof(v));
+ v.u32[0] = x ? NIR_TRUE : NIR_FALSE;
+
+ return nir_build_imm(build, 1, 32, v);
+}
+
+static inline nir_ssa_def *
+nir_imm_true(nir_builder *build)
+{
+ return nir_imm_bool(build, true);
+}
+
+static inline nir_ssa_def *
+nir_imm_false(nir_builder *build)
+{
+ return nir_imm_bool(build, false);
+}
+
+static inline nir_ssa_def *
+nir_imm_float16(nir_builder *build, float x)
+{
+ nir_const_value v;
+
+ memset(&v, 0, sizeof(v));
+ v.u16[0] = _mesa_float_to_half(x);
+
+ return nir_build_imm(build, 1, 16, v);
+}
+
static inline nir_ssa_def *
nir_imm_float(nir_builder *build, float x)
{
nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
{
switch (bit_size) {
+ case 16:
+ return nir_imm_float16(build, x);
case 32:
return nir_imm_float(build, x);
case 64:
return nir_build_imm(build, 4, 32, v);
}
+static inline nir_ssa_def *
+nir_imm_ivec2(nir_builder *build, int x, int y)
+{
+ nir_const_value v;
+
+ memset(&v, 0, sizeof(v));
+ v.i32[0] = x;
+ v.i32[1] = y;
+
+ return nir_build_imm(build, 2, 32, v);
+}
+
static inline nir_ssa_def *
nir_imm_int(nir_builder *build, int x)
{
* scalar value was passed into a multiply with a vector).
*/
for (unsigned i = 0; i < op_info->num_inputs; i++) {
- for (unsigned j = instr->src[i].src.ssa->num_components; j < 4; j++) {
+ for (unsigned j = instr->src[i].src.ssa->num_components;
+ j < NIR_MAX_VEC_COMPONENTS; j++) {
instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
}
}
* Construct an fmov or imov that reswizzles the source's components.
*/
static inline nir_ssa_def *
-nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned swiz[4],
+nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
unsigned num_components, bool use_fmov)
{
+ assert(num_components <= NIR_MAX_VEC_COMPONENTS);
nir_alu_src alu_src = { NIR_SRC_INIT };
alu_src.src = nir_src_for_ssa(src);
- for (unsigned i = 0; i < num_components; i++)
+ for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++)
alu_src.swizzle[i] = swiz[i];
return use_fmov ? nir_fmov_alu(build, alu_src, num_components) :
static inline nir_ssa_def *
nir_bany(nir_builder *b, nir_ssa_def *src)
{
- return nir_bany_inequal(b, src, nir_imm_int(b, 0));
+ return nir_bany_inequal(b, src, nir_imm_false(b));
}
static inline nir_ssa_def *
nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
{
- unsigned swizzle[4] = {c, c, c, c};
- return nir_swizzle(b, def, swizzle, 1, false);
+ return nir_swizzle(b, def, &c, 1, false);
}
static inline nir_ssa_def *
-nir_channels(nir_builder *b, nir_ssa_def *def, unsigned mask)
+nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
{
- unsigned num_channels = 0, swizzle[4] = { 0, 0, 0, 0 };
+ unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
- for (unsigned i = 0; i < 4; i++) {
+ for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
if ((mask & (1 << i)) == 0)
continue;
swizzle[num_channels++] = i;
return nir_swizzle(b, def, swizzle, num_channels, false);
}
+static inline nir_ssa_def *
+nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
+{
+ return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
+}
+
+static inline nir_ssa_def *
+nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
+{
+ return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
+}
+
+static inline nir_ssa_def *
+nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
+{
+ assert(src->num_components * src->bit_size == dest_bit_size);
+
+ switch (dest_bit_size) {
+ case 64:
+ switch (src->bit_size) {
+ case 32: return nir_pack_64_2x32(b, src);
+ case 16: return nir_pack_64_4x16(b, src);
+ default: break;
+ }
+ break;
+
+ case 32:
+ if (src->bit_size == 16)
+ return nir_pack_32_2x16(b, src);
+ break;
+
+ default:
+ break;
+ }
+
+ /* If we got here, we have no dedicated unpack opcode. */
+ nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
+ for (unsigned i = 0; i < src->num_components; i++) {
+ nir_ssa_def *val;
+ switch (dest_bit_size) {
+ case 64: val = nir_u2u64(b, nir_channel(b, src, i)); break;
+ case 32: val = nir_u2u32(b, nir_channel(b, src, i)); break;
+ case 16: val = nir_u2u16(b, nir_channel(b, src, i)); break;
+ default: unreachable("Invalid bit size");
+ }
+ val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
+ dest = nir_ior(b, dest, val);
+ }
+ return dest;
+}
+
+static inline nir_ssa_def *
+nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
+{
+ assert(src->num_components == 1);
+ assert(src->bit_size > dest_bit_size);
+ const unsigned dest_num_components = src->bit_size / dest_bit_size;
+ assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
+
+ switch (src->bit_size) {
+ case 64:
+ switch (dest_bit_size) {
+ case 32: return nir_unpack_64_2x32(b, src);
+ case 16: return nir_unpack_64_4x16(b, src);
+ default: break;
+ }
+ break;
+
+ case 32:
+ if (dest_bit_size == 16)
+ return nir_unpack_32_2x16(b, src);
+ break;
+
+ default:
+ break;
+ }
+
+ /* If we got here, we have no dedicated unpack opcode. */
+ nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
+ for (unsigned i = 0; i < dest_num_components; i++) {
+ nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
+ switch (dest_bit_size) {
+ case 32: dest_comps[i] = nir_u2u32(b, val); break;
+ case 16: dest_comps[i] = nir_u2u16(b, val); break;
+ case 8: dest_comps[i] = nir_u2u8(b, val); break;
+ default: unreachable("Invalid bit size");
+ }
+ }
+ return nir_vec(b, dest_comps, dest_num_components);
+}
+
+static inline nir_ssa_def *
+nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
+{
+ assert((src->bit_size * src->num_components) % dest_bit_size == 0);
+ const unsigned dest_num_components =
+ (src->bit_size * src->num_components) / dest_bit_size;
+ assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
+
+ if (src->bit_size > dest_bit_size) {
+ assert(src->bit_size % dest_bit_size == 0);
+ if (src->num_components == 1) {
+ return nir_unpack_bits(b, src, dest_bit_size);
+ } else {
+ const unsigned divisor = src->bit_size / dest_bit_size;
+ assert(src->num_components * divisor == dest_num_components);
+ nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
+ for (unsigned i = 0; i < src->num_components; i++) {
+ nir_ssa_def *unpacked =
+ nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
+ assert(unpacked->num_components == divisor);
+ for (unsigned j = 0; j < divisor; j++)
+ dest[i * divisor + j] = nir_channel(b, unpacked, j);
+ }
+ return nir_vec(b, dest, dest_num_components);
+ }
+ } else if (src->bit_size < dest_bit_size) {
+ assert(dest_bit_size % src->bit_size == 0);
+ if (dest_num_components == 1) {
+ return nir_pack_bits(b, src, dest_bit_size);
+ } else {
+ const unsigned divisor = dest_bit_size / src->bit_size;
+ assert(src->num_components == dest_num_components * divisor);
+ nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
+ for (unsigned i = 0; i < dest_num_components; i++) {
+ nir_component_mask_t src_mask =
+ ((1 << divisor) - 1) << (i * divisor);
+ dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
+ dest_bit_size);
+ }
+ return nir_vec(b, dest, dest_num_components);
+ }
+ } else {
+ assert(src->bit_size == dest_bit_size);
+ return src;
+ }
+}
+
/**
* Turns a nir_src into a nir_ssa_def * so it can be passed to
* nir_build_alu()-based builder calls.
static inline nir_ssa_def *
nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
{
- static uint8_t trivial_swizzle[4] = { 0, 1, 2, 3 };
+ static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
+ for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
+ trivial_swizzle[i] = i;
nir_alu_src *src = &instr->src[srcn];
unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
#include "nir_builder_opcodes.h"
+static inline nir_ssa_def *
+nir_f2b(nir_builder *build, nir_ssa_def *f)
+{
+ return nir_f2b32(build, f);
+}
+
+static inline nir_ssa_def *
+nir_i2b(nir_builder *build, nir_ssa_def *i)
+{
+ return nir_i2b32(build, i);
+}
+
static inline nir_ssa_def *
nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
unsigned interp_mode)
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