nir/lower_ssbo: Don't set align_* for atomics

[mesa.git] / src / compiler / nir / nir_builder_opcodes_h.py

diff --git a/src/compiler/nir/nir_builder_opcodes_h.py b/src/compiler/nir/nir_builder_opcodes_h.py
index f0d8cf1db68c6f5a556e6b71958f2665dba5bbdc..2c37be7c20ee7f5e65ea8528f09b18a7468fb6aa 100644 (file)
--- a/src/compiler/nir/nir_builder_opcodes_h.py
+++ b/src/compiler/nir/nir_builder_opcodes_h.py
@@ -53,13 +53,17 @@ nir_${name}(nir_builder *build, ${src_decl_list(opcode.num_inputs)})
 /* Generic builder for system values. */
 static inline nir_ssa_def *
 nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index,
-                      unsigned bit_size)
+                      unsigned num_components, unsigned bit_size)
 {
    nir_intrinsic_instr *load = nir_intrinsic_instr_create(build->shader, op);
-   load->num_components = nir_intrinsic_infos[op].dest_components;
+   if (nir_intrinsic_infos[op].dest_components > 0)
+      assert(num_components == nir_intrinsic_infos[op].dest_components);
+   else
+      load->num_components = num_components;
    load->const_index[0] = index;
+
    nir_ssa_dest_init(&load->instr, &load->dest,
-                     nir_intrinsic_infos[op].dest_components, bit_size, NULL);
+                     num_components, bit_size, NULL);
    nir_builder_instr_insert(build, &load->instr);
    return &load->dest.ssa;
 }
@@ -69,6 +73,8 @@ def sysval_decl_list(opcode):
    res = ''
    if opcode.indices:
       res += ', unsigned ' + opcode.indices[0].lower()
+   if opcode.dest_components == 0:
+      res += ', unsigned num_components'
    if len(opcode.bit_sizes) != 1:
       res += ', unsigned bit_size'
    return res
@@ -80,6 +86,11 @@ def sysval_arg_list(opcode):
    else:
       args.append('0')
 
+   if opcode.dest_components == 0:
+      args.append('num_components')
+   else:
+      args.append(str(opcode.dest_components))
+
    if len(opcode.bit_sizes) == 1:
       bit_size = opcode.bit_sizes[0]
       args.append(str(bit_size))