#include "nir_instr_set.h"
#include "nir_vla.h"
+#include "util/half_float.h"
#define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
break;
case nir_deref_type_array:
+ case nir_deref_type_ptr_as_array:
hash = hash_src(hash, &instr->arr.index);
break;
+ case nir_deref_type_cast:
+ hash = HASH(hash, instr->cast.ptr_stride);
+ break;
+
case nir_deref_type_var:
case nir_deref_type_array_wildcard:
- case nir_deref_type_cast:
/* Nothing to do */
break;
hash = HASH(hash, instr->is_new_style_shadow);
unsigned component = instr->component;
hash = HASH(hash, component);
+ for (unsigned i = 0; i < 4; ++i)
+ for (unsigned j = 0; j < 2; ++j)
+ hash = HASH(hash, instr->tg4_offsets[i][j]);
hash = HASH(hash, instr->texture_index);
hash = HASH(hash, instr->texture_array_size);
hash = HASH(hash, instr->sampler_index);
}
}
+/**
+ * If the \p s is an SSA value that was generated by a negation instruction,
+ * that instruction is returned as a \c nir_alu_instr. Otherwise \c NULL is
+ * returned.
+ */
+static const struct nir_alu_instr *
+get_neg_instr(const nir_src *s)
+{
+ const struct nir_alu_instr *const alu = nir_src_as_alu_instr_const(s);
+
+ return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
+ ? alu : NULL;
+}
+
+bool
+nir_const_value_negative_equal(const nir_const_value *c1,
+ const nir_const_value *c2,
+ unsigned components,
+ nir_alu_type base_type,
+ unsigned bits)
+{
+ assert(base_type == nir_alu_type_get_base_type(base_type));
+ assert(base_type != nir_type_invalid);
+
+ /* This can occur for 1-bit Boolean values. */
+ if (bits == 1)
+ return false;
+
+ switch (base_type) {
+ case nir_type_float:
+ switch (bits) {
+ case 16:
+ for (unsigned i = 0; i < components; i++) {
+ if (_mesa_half_to_float(c1->u16[i]) !=
+ -_mesa_half_to_float(c2->u16[i])) {
+ return false;
+ }
+ }
+
+ return true;
+
+ case 32:
+ for (unsigned i = 0; i < components; i++) {
+ if (c1->f32[i] != -c2->f32[i])
+ return false;
+ }
+
+ return true;
+
+ case 64:
+ for (unsigned i = 0; i < components; i++) {
+ if (c1->f64[i] != -c2->f64[i])
+ return false;
+ }
+
+ return true;
+
+ default:
+ unreachable("unknown bit size");
+ }
+
+ break;
+
+ case nir_type_int:
+ case nir_type_uint:
+ switch (bits) {
+ case 8:
+ for (unsigned i = 0; i < components; i++) {
+ if (c1->i8[i] != -c2->i8[i])
+ return false;
+ }
+
+ return true;
+
+ case 16:
+ for (unsigned i = 0; i < components; i++) {
+ if (c1->i16[i] != -c2->i16[i])
+ return false;
+ }
+
+ return true;
+ break;
+
+ case 32:
+ for (unsigned i = 0; i < components; i++) {
+ if (c1->i32[i] != -c2->i32[i])
+ return false;
+ }
+
+ return true;
+
+ case 64:
+ for (unsigned i = 0; i < components; i++) {
+ if (c1->i64[i] != -c2->i64[i])
+ return false;
+ }
+
+ return true;
+
+ default:
+ unreachable("unknown bit size");
+ }
+
+ break;
+
+ case nir_type_bool:
+ return false;
+
+ default:
+ break;
+ }
+
+ return false;
+}
+
+/**
+ * Shallow compare of ALU srcs to determine if one is the negation of the other
+ *
+ * This function detects cases where \p alu1 is a constant and \p alu2 is a
+ * constant that is its negation. It will also detect cases where \p alu2 is
+ * an SSA value that is a \c nir_op_fneg applied to \p alu1 (and vice versa).
+ *
+ * This function does not detect the general case when \p alu1 and \p alu2 are
+ * SSA values that are the negations of each other (e.g., \p alu1 represents
+ * (a * b) and \p alu2 represents (-a * b)).
+ */
+bool
+nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
+ const nir_alu_instr *alu2,
+ unsigned src1, unsigned src2)
+{
+ if (alu1->src[src1].abs != alu2->src[src2].abs)
+ return false;
+
+ bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
+
+ /* Handling load_const instructions is tricky. */
+
+ const nir_const_value *const const1 =
+ nir_src_as_const_value(alu1->src[src1].src);
+
+ if (const1 != NULL) {
+ /* Assume that constant folding will eliminate source mods and unary
+ * ops.
+ */
+ if (parity)
+ return false;
+
+ const nir_const_value *const const2 =
+ nir_src_as_const_value(alu2->src[src2].src);
+
+ if (const2 == NULL)
+ return false;
+
+ /* FINISHME: Apply the swizzle? */
+ return nir_const_value_negative_equal(const1,
+ const2,
+ nir_ssa_alu_instr_src_components(alu1, src1),
+ nir_op_infos[alu1->op].input_types[src1],
+ alu1->dest.dest.ssa.bit_size);
+ }
+
+ uint8_t alu1_swizzle[4] = {0};
+ nir_src alu1_actual_src;
+ const struct nir_alu_instr *const neg1 = get_neg_instr(&alu1->src[src1].src);
+
+ if (neg1) {
+ parity = !parity;
+ alu1_actual_src = neg1->src[0].src;
+
+ for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg1, 0); i++)
+ alu1_swizzle[i] = neg1->src[0].swizzle[i];
+ } else {
+ alu1_actual_src = alu1->src[src1].src;
+
+ for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++)
+ alu1_swizzle[i] = i;
+ }
+
+ uint8_t alu2_swizzle[4] = {0};
+ nir_src alu2_actual_src;
+ const struct nir_alu_instr *const neg2 = get_neg_instr(&alu2->src[src2].src);
+
+ if (neg2) {
+ parity = !parity;
+ alu2_actual_src = neg2->src[0].src;
+
+ for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg2, 0); i++)
+ alu2_swizzle[i] = neg2->src[0].swizzle[i];
+ } else {
+ alu2_actual_src = alu2->src[src2].src;
+
+ for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu2, src2); i++)
+ alu2_swizzle[i] = i;
+ }
+
+ for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
+ if (alu1_swizzle[alu1->src[src1].swizzle[i]] !=
+ alu2_swizzle[alu2->src[src2].swizzle[i]])
+ return false;
+ }
+
+ return parity && nir_srcs_equal(alu1_actual_src, alu2_actual_src);
+}
+
bool
nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
unsigned src1, unsigned src2)
break;
case nir_deref_type_array:
+ case nir_deref_type_ptr_as_array:
if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
return false;
break;
+ case nir_deref_type_cast:
+ if (deref1->cast.ptr_stride != deref2->cast.ptr_stride)
+ return false;
+ break;
+
case nir_deref_type_var:
case nir_deref_type_array_wildcard:
- case nir_deref_type_cast:
/* Nothing to do */
break;
return false;
}
+ if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
+ sizeof(tex1->tg4_offsets)))
+ return false;
+
return true;
}
case nir_instr_type_load_const: {
return dest->is_ssa;
}
+static inline bool
+instr_each_src_and_dest_is_ssa(nir_instr *instr)
+{
+ if (!nir_foreach_dest(instr, dest_is_ssa, NULL) ||
+ !nir_foreach_src(instr, src_is_ssa, NULL))
+ return false;
+
+ return true;
+}
+
/* This function determines if uses of an instruction can safely be rewritten
* to use another identical instruction instead. Note that this function must
* be kept in sync with hash_instr() and nir_instrs_equal() -- only
instr_can_rewrite(nir_instr *instr)
{
/* We only handle SSA. */
- if (!nir_foreach_dest(instr, dest_is_ssa, NULL) ||
- !nir_foreach_src(instr, src_is_ssa, NULL))
- return false;
+ assert(instr_each_src_and_dest_is_ssa(instr));
switch (instr->type) {
case nir_instr_type_alu:
if (!instr_can_rewrite(instr))
return false;
- struct set_entry *entry = _mesa_set_search(instr_set, instr);
- if (entry) {
+ uint32_t hash = hash_instr(instr);
+ struct set_entry *e = _mesa_set_search_pre_hashed(instr_set, hash, instr);
+ if (e) {
nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
- nir_instr *match = (nir_instr *) entry->key;
+ nir_instr *match = (nir_instr *) e->key;
nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
/* It's safe to replace an exact instruction with an inexact one as
return true;
}
- _mesa_set_add(instr_set, instr);
+ _mesa_set_add_pre_hashed(instr_set, hash, instr);
return false;
}
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