nir: Support vec8/vec16 in nir_lower_bit_size
[mesa.git] / src / compiler / nir / nir_lower_bit_size.c
index 531e6aa5289f7f4a1a30120d56db7de86ecb9f4c..a6a2032b010b94f4c38e9208748fe792a6c9ae4c 100644 (file)
  * a bit-size that is supported natively and then converts the result back to
  * the original bit-size.
  */
-static nir_ssa_def *
-convert_to_bit_size(nir_builder *bld,
-                    nir_ssa_def *src,
-                    nir_alu_type type,
-                    unsigned bit_size)
-{
-   nir_alu_type base_type = nir_alu_type_get_base_type(type);
-   nir_alu_type lowered_type = bit_size | base_type;
-
-   nir_op opcode =
-      nir_type_conversion_op(type, lowered_type, nir_rounding_mode_undef);
-
-   return nir_build_alu(bld, opcode, src, NULL, NULL, NULL);
-}
 
 static void
 lower_instr(nir_builder *bld, nir_alu_instr *alu, unsigned bit_size)
 {
    const nir_op op = alu->op;
+   unsigned dst_bit_size = alu->dest.dest.ssa.bit_size;
 
    bld->cursor = nir_before_instr(&alu->instr);
 
    /* Convert each source to the requested bit-size */
-   nir_ssa_def *srcs[4] = { NULL, NULL, NULL, NULL };
+   nir_ssa_def *srcs[NIR_MAX_VEC_COMPONENTS] = { NULL };
    for (unsigned i = 0; i < nir_op_infos[op].num_inputs; i++) {
       nir_ssa_def *src = nir_ssa_for_alu_src(bld, alu, i);
 
       nir_alu_type type = nir_op_infos[op].input_types[i];
       if (nir_alu_type_get_type_size(type) == 0)
-         srcs[i] = convert_to_bit_size(bld, src, type, bit_size);
-      else
-         srcs[i] = src;
+         src = nir_convert_to_bit_size(bld, src, type, bit_size);
+
+      if (i == 1 && (op == nir_op_ishl || op == nir_op_ishr || op == nir_op_ushr)) {
+         assert(util_is_power_of_two_nonzero(dst_bit_size));
+         src = nir_iand(bld, src, nir_imm_int(bld, dst_bit_size - 1));
+      }
+
+      srcs[i] = src;
    }
 
    /* Emit the lowered ALU instruction */
-   nir_ssa_def *lowered_dst =
-      nir_build_alu(bld, op, srcs[0], srcs[1], srcs[2], srcs[3]);
+   nir_ssa_def *lowered_dst = NULL;
+   if (op == nir_op_imul_high || op == nir_op_umul_high) {
+      assert(dst_bit_size * 2 <= bit_size);
+      nir_ssa_def *lowered_dst = nir_imul(bld, srcs[0], srcs[1]);
+      if (nir_op_infos[op].output_type & nir_type_uint)
+         lowered_dst = nir_ushr(bld, lowered_dst, nir_imm_int(bld, dst_bit_size));
+      else
+         lowered_dst = nir_ishr(bld, lowered_dst, nir_imm_int(bld, dst_bit_size));
+   } else {
+      lowered_dst = nir_build_alu_src_arr(bld, op, srcs);
+   }
+
 
    /* Convert result back to the original bit-size */
-   unsigned dst_bit_size = alu->dest.dest.ssa.bit_size;
    nir_alu_type type = nir_op_infos[op].output_type;
-   nir_ssa_def *dst = convert_to_bit_size(bld, lowered_dst, type, dst_bit_size);
+   nir_ssa_def *dst = nir_convert_to_bit_size(bld, lowered_dst, type, dst_bit_size);
    nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, nir_src_for_ssa(dst));
 }
 
@@ -105,6 +106,8 @@ lower_impl(nir_function_impl *impl,
    if (progress) {
       nir_metadata_preserve(impl, nir_metadata_block_index |
                                   nir_metadata_dominance);
+   } else {
+      nir_metadata_preserve(impl, nir_metadata_all);
    }
 
    return progress;