{
const nir_op_info *op_info = &nir_op_infos[alu->op];
+ assert(alu->dest.dest.is_ssa);
+
switch (alu->op) {
- case nir_op_imov:
+ case nir_op_mov:
case nir_op_vec2:
case nir_op_vec3:
case nir_op_vec4:
+ case nir_op_vec8:
+ case nir_op_vec16:
case nir_op_inot:
case nir_op_iand:
case nir_op_ior:
case nir_op_f2b1: alu->op = nir_op_f2b32; break;
case nir_op_i2b1: alu->op = nir_op_i2b32; break;
+ case nir_op_b2b32:
+ case nir_op_b2b1:
+ /* We're mutating instructions in a dominance-preserving order so our
+ * source boolean should be 32-bit by now.
+ */
+ assert(nir_src_bit_size(alu->src[0].src) == 32);
+ alu->op = nir_op_mov;
+ break;
+
case nir_op_flt: alu->op = nir_op_flt32; break;
case nir_op_fge: alu->op = nir_op_fge32; break;
case nir_op_feq: alu->op = nir_op_feq32; break;
case nir_instr_type_load_const: {
nir_load_const_instr *load = nir_instr_as_load_const(instr);
if (load->def.bit_size == 1) {
- nir_const_value value = load->value;
+ nir_const_value *value = load->value;
for (unsigned i = 0; i < load->def.num_components; i++)
- load->value.u32[i] = value.b[i] ? NIR_TRUE : NIR_FALSE;
+ load->value[i].u32 = value[i].b ? NIR_TRUE : NIR_FALSE;
load->def.bit_size = 32;
progress = true;
}