tint = "int"
tbool = "bool"
tbool1 = "bool1"
+tbool8 = "bool8"
+tbool16 = "bool16"
tbool32 = "bool32"
tuint = "uint"
tuint16 = "uint16"
if type_has_size(type_):
return [type_size(type_)]
elif type_ == 'bool':
- return [1, 32]
+ return [1, 8, 16, 32]
elif type_ == 'float':
return [16, 32, 64]
else:
assert m is not None, 'Invalid NIR type string: "{}"'.format(type_)
return m.group('type')
-commutative = "commutative "
+# Operation where the first two sources are commutative.
+#
+# For 2-source operations, this just mathematical commutativity. Some
+# 3-source operations, like ffma, are only commutative in the first two
+# sources.
+_2src_commutative = "2src_commutative "
associative = "associative "
# global dictionary of opcodes
def unop_numeric_convert(name, out_type, in_type, const_expr):
opcode(name, 0, out_type, [0], [in_type], True, "", const_expr)
-# These two move instructions differ in what modifiers they support and what
-# the negate modifier means. Otherwise, they are identical.
-unop("fmov", tfloat, "src0")
-unop("imov", tint, "src0")
+unop("mov", tuint, "src0")
unop("ineg", tint, "-src0")
unop("fneg", tfloat, "-src0")
unop("inot", tint, "~src0") # invert every bit of the integer
-unop("fnot", tfloat, ("bit_size == 64 ? ((src0 == 0.0) ? 1.0 : 0.0f) : " +
- "((src0 == 0.0f) ? 1.0f : 0.0f)"))
unop("fsign", tfloat, ("bit_size == 64 ? " +
"((src0 == 0.0) ? 0.0 : ((src0 > 0.0) ? 1.0 : -1.0)) : " +
"((src0 == 0.0f) ? 0.0f : ((src0 > 0.0f) ? 1.0f : -1.0f))"))
dst_types = [tint, tuint, tfloat, tbool]
for dst_t in dst_types:
- for bit_size in type_sizes(dst_t):
- if bit_size == 16 and dst_t == tfloat and src_t == tfloat:
+ for dst_bit_size in type_sizes(dst_t):
+ if dst_bit_size == 16 and dst_t == tfloat and src_t == tfloat:
rnd_modes = ['_rtne', '_rtz', '']
for rnd_mode in rnd_modes:
- unop_numeric_convert("{0}2{1}{2}{3}".format(src_t[0], dst_t[0],
- bit_size, rnd_mode),
- dst_t + str(bit_size), src_t, "src0")
+ if rnd_mode == '_rtne':
+ conv_expr = """
+ if (bit_size > 16) {
+ dst = _mesa_half_to_float(_mesa_float_to_float16_rtne(src0));
+ } else {
+ dst = src0;
+ }
+ """
+ elif rnd_mode == '_rtz':
+ conv_expr = """
+ if (bit_size > 16) {
+ dst = _mesa_half_to_float(_mesa_float_to_float16_rtz(src0));
+ } else {
+ dst = src0;
+ }
+ """
+ else:
+ conv_expr = "src0"
+
+ unop_numeric_convert("{0}2{1}{2}{3}".format(src_t[0],
+ dst_t[0],
+ dst_bit_size,
+ rnd_mode),
+ dst_t + str(dst_bit_size),
+ src_t, conv_expr)
+ elif dst_bit_size == 32 and dst_t == tfloat and src_t == tfloat:
+ conv_expr = """
+ if (bit_size > 32 && nir_is_rounding_mode_rtz(execution_mode, 32)) {
+ dst = _mesa_double_to_float_rtz(src0);
+ } else {
+ dst = src0;
+ }
+ """
+ unop_numeric_convert("{0}2{1}{2}".format(src_t[0], dst_t[0],
+ dst_bit_size),
+ dst_t + str(dst_bit_size), src_t, conv_expr)
else:
conv_expr = "src0 != 0" if dst_t == tbool else "src0"
- unop_numeric_convert("{0}2{1}{2}".format(src_t[0], dst_t[0], bit_size),
- dst_t + str(bit_size), src_t, conv_expr)
+ unop_numeric_convert("{0}2{1}{2}".format(src_t[0], dst_t[0],
+ dst_bit_size),
+ dst_t + str(dst_bit_size), src_t, conv_expr)
# Unary floating-point rounding operations.
unop_horiz("unpack_32_2x16", 2, tuint16, 1, tuint32,
"dst.x = src0.x; dst.y = src0.x >> 16;")
-# Lowered floating point unpacking operations.
+unop_horiz("unpack_half_2x16_flush_to_zero", 2, tfloat32, 1, tuint32, """
+dst.x = unpack_half_1x16_flush_to_zero((uint16_t)(src0.x & 0xffff));
+dst.y = unpack_half_1x16_flush_to_zero((uint16_t)(src0.x << 16));
+""")
+# Lowered floating point unpacking operations.
unop_convert("unpack_half_2x16_split_x", tfloat32, tuint32,
"unpack_half_1x16((uint16_t)(src0 & 0xffff))")
unop_convert("unpack_half_2x16_split_y", tfloat32, tuint32,
"unpack_half_1x16((uint16_t)(src0 >> 16))")
+unop_convert("unpack_half_2x16_split_x_flush_to_zero", tfloat32, tuint32,
+ "unpack_half_1x16_flush_to_zero((uint16_t)(src0 & 0xffff))")
+unop_convert("unpack_half_2x16_split_y_flush_to_zero", tfloat32, tuint32,
+ "unpack_half_1x16_flush_to_zero((uint16_t)(src0 >> 16))")
+
unop_convert("unpack_32_2x16_split_x", tuint16, tuint32, "src0")
unop_convert("unpack_32_2x16_split_y", tuint16, tuint32, "src0 >> 16")
if (src0.z < 0 && absZ >= absX && absZ >= absY) dst.x = 5;
""")
+# Sum of vector components
+unop_reduce("fsum", 1, tfloat, tfloat, "{src}", "{src0} + {src1}", "{src}")
def binop_convert(name, out_type, in_type, alg_props, const_expr):
opcode(name, 0, out_type, [0, 0], [in_type, in_type],
def binop_compare(name, ty, alg_props, const_expr):
binop_convert(name, tbool1, ty, alg_props, const_expr)
+def binop_compare8(name, ty, alg_props, const_expr):
+ binop_convert(name, tbool8, ty, alg_props, const_expr)
+
+def binop_compare16(name, ty, alg_props, const_expr):
+ binop_convert(name, tbool16, ty, alg_props, const_expr)
+
def binop_compare32(name, ty, alg_props, const_expr):
binop_convert(name, tbool32, ty, alg_props, const_expr)
+def binop_compare_all_sizes(name, ty, alg_props, const_expr):
+ binop_compare(name, ty, alg_props, const_expr)
+ binop_compare8(name + "8", ty, alg_props, const_expr)
+ binop_compare16(name + "16", ty, alg_props, const_expr)
+ binop_compare32(name + "32", ty, alg_props, const_expr)
+
def binop_horiz(name, out_size, out_type, src1_size, src1_type, src2_size,
src2_type, const_expr):
opcode(name, out_size, out_type, [src1_size, src2_size], [src1_type, src2_type],
src2 = prereduce("src0.z", "src1.z")
src3 = prereduce("src0.w", "src1.w")
opcode(name + "2", output_size, output_type,
- [2, 2], [src_type, src_type], False, commutative,
+ [2, 2], [src_type, src_type], False, _2src_commutative,
final(reduce_(src0, src1)))
opcode(name + "3", output_size, output_type,
- [3, 3], [src_type, src_type], False, commutative,
+ [3, 3], [src_type, src_type], False, _2src_commutative,
final(reduce_(reduce_(src0, src1), src2)))
opcode(name + "4", output_size, output_type,
- [4, 4], [src_type, src_type], False, commutative,
+ [4, 4], [src_type, src_type], False, _2src_commutative,
final(reduce_(reduce_(src0, src1), reduce_(src2, src3))))
-binop("fadd", tfloat, commutative + associative, "src0 + src1")
-binop("iadd", tint, commutative + associative, "src0 + src1")
-binop("iadd_sat", tint, commutative + associative, """
+def binop_reduce_all_sizes(name, output_size, src_type, prereduce_expr,
+ reduce_expr, final_expr):
+ binop_reduce(name, output_size, tbool1, src_type,
+ prereduce_expr, reduce_expr, final_expr)
+ binop_reduce("b8" + name[1:], output_size, tbool8, src_type,
+ prereduce_expr, reduce_expr, final_expr)
+ binop_reduce("b16" + name[1:], output_size, tbool16, src_type,
+ prereduce_expr, reduce_expr, final_expr)
+ binop_reduce("b32" + name[1:], output_size, tbool32, src_type,
+ prereduce_expr, reduce_expr, final_expr)
+
+binop("fadd", tfloat, _2src_commutative + associative,"""
+if (nir_is_rounding_mode_rtz(execution_mode, bit_size)) {
+ if (bit_size == 64)
+ dst = _mesa_double_add_rtz(src0, src1);
+ else
+ dst = _mesa_double_to_float_rtz((double)src0 + (double)src1);
+} else {
+ dst = src0 + src1;
+}
+""")
+binop("iadd", tint, _2src_commutative + associative, "src0 + src1")
+binop("iadd_sat", tint, _2src_commutative, """
src1 > 0 ?
(src0 + src1 < src0 ? (1ull << (bit_size - 1)) - 1 : src0 + src1) :
(src0 < src0 + src1 ? (1ull << (bit_size - 1)) : src0 + src1)
""")
-binop("uadd_sat", tuint, commutative,
- "(src0 + src1) < src0 ? UINT64_MAX : (src0 + src1)")
+binop("uadd_sat", tuint, _2src_commutative,
+ "(src0 + src1) < src0 ? MAX_UINT_FOR_SIZE(sizeof(src0) * 8) : (src0 + src1)")
binop("isub_sat", tint, "", """
src1 < 0 ?
(src0 - src1 < src0 ? (1ull << (bit_size - 1)) - 1 : src0 - src1) :
""")
binop("usub_sat", tuint, "", "src0 < src1 ? 0 : src0 - src1")
-binop("fsub", tfloat, "", "src0 - src1")
+binop("fsub", tfloat, "", """
+if (nir_is_rounding_mode_rtz(execution_mode, bit_size)) {
+ if (bit_size == 64)
+ dst = _mesa_double_sub_rtz(src0, src1);
+ else
+ dst = _mesa_double_to_float_rtz((double)src0 - (double)src1);
+} else {
+ dst = src0 - src1;
+}
+""")
binop("isub", tint, "", "src0 - src1")
-binop("fmul", tfloat, commutative + associative, "src0 * src1")
+binop("fmul", tfloat, _2src_commutative + associative, """
+if (nir_is_rounding_mode_rtz(execution_mode, bit_size)) {
+ if (bit_size == 64)
+ dst = _mesa_double_mul_rtz(src0, src1);
+ else
+ dst = _mesa_double_to_float_rtz((double)src0 * (double)src1);
+} else {
+ dst = src0 * src1;
+}
+""")
# low 32-bits of signed/unsigned integer multiply
-binop("imul", tint, commutative + associative, "src0 * src1")
+binop("imul", tint, _2src_commutative + associative, "src0 * src1")
# Generate 64 bit result from 2 32 bits quantity
-binop_convert("imul_2x32_64", tint64, tint32, commutative,
+binop_convert("imul_2x32_64", tint64, tint32, _2src_commutative,
"(int64_t)src0 * (int64_t)src1")
-binop_convert("umul_2x32_64", tuint64, tuint32, commutative,
+binop_convert("umul_2x32_64", tuint64, tuint32, _2src_commutative,
"(uint64_t)src0 * (uint64_t)src1")
# high 32-bits of signed integer multiply
-binop("imul_high", tint, commutative, """
+binop("imul_high", tint, _2src_commutative, """
if (bit_size == 64) {
/* We need to do a full 128-bit x 128-bit multiply in order for the sign
* extension to work properly. The casts are kind-of annoying but needed
""")
# high 32-bits of unsigned integer multiply
-binop("umul_high", tuint, commutative, """
+binop("umul_high", tuint, _2src_commutative, """
if (bit_size == 64) {
/* The casts are kind-of annoying but needed to prevent compiler warnings. */
uint32_t src0_u32[2] = { src0, (uint64_t)src0 >> 32 };
}
""")
+# low 32-bits of unsigned integer multiply
+binop("umul_low", tuint32, _2src_commutative, """
+uint64_t mask = (1 << (bit_size / 2)) - 1;
+dst = ((uint64_t)src0 & mask) * ((uint64_t)src1 & mask);
+""")
+
+
binop("fdiv", tfloat, "", "src0 / src1")
binop("idiv", tint, "", "src1 == 0 ? 0 : (src0 / src1)")
binop("udiv", tuint, "", "src1 == 0 ? 0 : (src0 / src1)")
# returns a boolean representing the carry resulting from the addition of
# the two unsigned arguments.
-binop_convert("uadd_carry", tuint, tuint, commutative, "src0 + src1 < src0")
+binop_convert("uadd_carry", tuint, tuint, _2src_commutative, "src0 + src1 < src0")
# returns a boolean representing the borrow resulting from the subtraction
# of the two unsigned arguments.
#
# (x + y) >> 1 = (((x & y) << 1) + (x ^ y)) >> 1
# = (x & y) + ((x ^ y) >> 1)
-binop("ihadd", tint, commutative, "(src0 & src1) + ((src0 ^ src1) >> 1)")
-binop("uhadd", tuint, commutative, "(src0 & src1) + ((src0 ^ src1) >> 1)")
+binop("ihadd", tint, _2src_commutative, "(src0 & src1) + ((src0 ^ src1) >> 1)")
+binop("uhadd", tuint, _2src_commutative, "(src0 & src1) + ((src0 ^ src1) >> 1)")
# rhadd: (a + b + 1) >> 1 (without overflow)
# x + y + 1 = x + (~x & y) - (~x & y) + y + (x & ~y) - (x & ~y) + 1
#
# (x + y + 1) >> 1 = (x | y) + (-(x ^ y) + 1) >> 1)
# = (x | y) - ((x ^ y) >> 1)
-binop("irhadd", tint, commutative, "(src0 | src1) + ((src0 ^ src1) >> 1)")
-binop("urhadd", tuint, commutative, "(src0 | src1) + ((src0 ^ src1) >> 1)")
+binop("irhadd", tint, _2src_commutative, "(src0 | src1) + ((src0 ^ src1) >> 1)")
+binop("urhadd", tuint, _2src_commutative, "(src0 | src1) + ((src0 ^ src1) >> 1)")
binop("umod", tuint, "", "src1 == 0 ? 0 : src0 % src1")
# these integer-aware comparisons return a boolean (0 or ~0)
-binop_compare("flt", tfloat, "", "src0 < src1")
-binop_compare("fge", tfloat, "", "src0 >= src1")
-binop_compare("feq", tfloat, commutative, "src0 == src1")
-binop_compare("fne", tfloat, commutative, "src0 != src1")
-binop_compare("ilt", tint, "", "src0 < src1")
-binop_compare("ige", tint, "", "src0 >= src1")
-binop_compare("ieq", tint, commutative, "src0 == src1")
-binop_compare("ine", tint, commutative, "src0 != src1")
-binop_compare("ult", tuint, "", "src0 < src1")
-binop_compare("uge", tuint, "", "src0 >= src1")
-binop_compare32("flt32", tfloat, "", "src0 < src1")
-binop_compare32("fge32", tfloat, "", "src0 >= src1")
-binop_compare32("feq32", tfloat, commutative, "src0 == src1")
-binop_compare32("fne32", tfloat, commutative, "src0 != src1")
-binop_compare32("ilt32", tint, "", "src0 < src1")
-binop_compare32("ige32", tint, "", "src0 >= src1")
-binop_compare32("ieq32", tint, commutative, "src0 == src1")
-binop_compare32("ine32", tint, commutative, "src0 != src1")
-binop_compare32("ult32", tuint, "", "src0 < src1")
-binop_compare32("uge32", tuint, "", "src0 >= src1")
+binop_compare_all_sizes("flt", tfloat, "", "src0 < src1")
+binop_compare_all_sizes("fge", tfloat, "", "src0 >= src1")
+binop_compare_all_sizes("feq", tfloat, _2src_commutative, "src0 == src1")
+binop_compare_all_sizes("fne", tfloat, _2src_commutative, "src0 != src1")
+binop_compare_all_sizes("ilt", tint, "", "src0 < src1")
+binop_compare_all_sizes("ige", tint, "", "src0 >= src1")
+binop_compare_all_sizes("ieq", tint, _2src_commutative, "src0 == src1")
+binop_compare_all_sizes("ine", tint, _2src_commutative, "src0 != src1")
+binop_compare_all_sizes("ult", tuint, "", "src0 < src1")
+binop_compare_all_sizes("uge", tuint, "", "src0 >= src1")
# integer-aware GLSL-style comparisons that compare floats and ints
-binop_reduce("ball_fequal", 1, tbool1, tfloat, "{src0} == {src1}",
- "{src0} && {src1}", "{src}")
-binop_reduce("bany_fnequal", 1, tbool1, tfloat, "{src0} != {src1}",
- "{src0} || {src1}", "{src}")
-binop_reduce("ball_iequal", 1, tbool1, tint, "{src0} == {src1}",
- "{src0} && {src1}", "{src}")
-binop_reduce("bany_inequal", 1, tbool1, tint, "{src0} != {src1}",
- "{src0} || {src1}", "{src}")
-
-binop_reduce("b32all_fequal", 1, tbool32, tfloat, "{src0} == {src1}",
- "{src0} && {src1}", "{src}")
-binop_reduce("b32any_fnequal", 1, tbool32, tfloat, "{src0} != {src1}",
- "{src0} || {src1}", "{src}")
-binop_reduce("b32all_iequal", 1, tbool32, tint, "{src0} == {src1}",
- "{src0} && {src1}", "{src}")
-binop_reduce("b32any_inequal", 1, tbool32, tint, "{src0} != {src1}",
- "{src0} || {src1}", "{src}")
+binop_reduce_all_sizes("ball_fequal", 1, tfloat, "{src0} == {src1}",
+ "{src0} && {src1}", "{src}")
+binop_reduce_all_sizes("bany_fnequal", 1, tfloat, "{src0} != {src1}",
+ "{src0} || {src1}", "{src}")
+binop_reduce_all_sizes("ball_iequal", 1, tint, "{src0} == {src1}",
+ "{src0} && {src1}", "{src}")
+binop_reduce_all_sizes("bany_inequal", 1, tint, "{src0} != {src1}",
+ "{src0} || {src1}", "{src}")
# non-integer-aware GLSL-style comparisons that return 0.0 or 1.0
binop("slt", tfloat32, "", "(src0 < src1) ? 1.0f : 0.0f") # Set on Less Than
binop("sge", tfloat, "", "(src0 >= src1) ? 1.0f : 0.0f") # Set on Greater or Equal
-binop("seq", tfloat32, commutative, "(src0 == src1) ? 1.0f : 0.0f") # Set on Equal
-binop("sne", tfloat32, commutative, "(src0 != src1) ? 1.0f : 0.0f") # Set on Not Equal
+binop("seq", tfloat32, _2src_commutative, "(src0 == src1) ? 1.0f : 0.0f") # Set on Equal
+binop("sne", tfloat32, _2src_commutative, "(src0 != src1) ? 1.0f : 0.0f") # Set on Not Equal
# SPIRV shifts are undefined for shift-operands >= bitsize,
# but SM5 shifts are defined to use the least significant bits, only
opcode("ushr", 0, tuint, [0, 0], [tuint, tuint32], False, "",
"src0 >> (src1 & (sizeof(src0) * 8 - 1))")
+opcode("urol", 0, tuint, [0, 0], [tuint, tuint32], False, "", """
+ uint32_t rotate_mask = sizeof(src0) * 8 - 1;
+ dst = (src0 << (src1 & rotate_mask)) |
+ (src0 >> (-src1 & rotate_mask));
+""")
+opcode("uror", 0, tuint, [0, 0], [tuint, tuint32], False, "", """
+ uint32_t rotate_mask = sizeof(src0) * 8 - 1;
+ dst = (src0 >> (src1 & rotate_mask)) |
+ (src0 << (-src1 & rotate_mask));
+""")
+
# bitwise logic operators
#
# These are also used as boolean and, or, xor for hardware supporting
# integers.
-binop("iand", tuint, commutative + associative, "src0 & src1")
-binop("ior", tuint, commutative + associative, "src0 | src1")
-binop("ixor", tuint, commutative + associative, "src0 ^ src1")
-
-
-# floating point logic operators
-#
-# These use (src != 0.0) for testing the truth of the input, and output 1.0
-# for true and 0.0 for false
+binop("iand", tuint, _2src_commutative + associative, "src0 & src1")
+binop("ior", tuint, _2src_commutative + associative, "src0 | src1")
+binop("ixor", tuint, _2src_commutative + associative, "src0 ^ src1")
-binop("fand", tfloat32, commutative,
- "((src0 != 0.0f) && (src1 != 0.0f)) ? 1.0f : 0.0f")
-binop("for", tfloat32, commutative,
- "((src0 != 0.0f) || (src1 != 0.0f)) ? 1.0f : 0.0f")
-binop("fxor", tfloat32, commutative,
- "(src0 != 0.0f && src1 == 0.0f) || (src0 == 0.0f && src1 != 0.0f) ? 1.0f : 0.0f")
binop_reduce("fdot", 1, tfloat, tfloat, "{src0} * {src1}", "{src0} + {src1}",
"{src}")
opcode("fdph_replicated", 4, tfloat, [3, 4], [tfloat, tfloat], False, "",
"src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w")
-binop("fmin", tfloat, "", "fminf(src0, src1)")
-binop("imin", tint, commutative + associative, "src1 > src0 ? src0 : src1")
-binop("umin", tuint, commutative + associative, "src1 > src0 ? src0 : src1")
-binop("fmax", tfloat, "", "fmaxf(src0, src1)")
-binop("imax", tint, commutative + associative, "src1 > src0 ? src1 : src0")
-binop("umax", tuint, commutative + associative, "src1 > src0 ? src1 : src0")
+binop("fmin", tfloat, "", "fmin(src0, src1)")
+binop("imin", tint, _2src_commutative + associative, "src1 > src0 ? src0 : src1")
+binop("umin", tuint, _2src_commutative + associative, "src1 > src0 ? src0 : src1")
+binop("fmax", tfloat, "", "fmax(src0, src1)")
+binop("imax", tint, _2src_commutative + associative, "src1 > src0 ? src1 : src0")
+binop("umax", tuint, _2src_commutative + associative, "src1 > src0 ? src1 : src0")
# Saturated vector add for 4 8bit ints.
-binop("usadd_4x8", tint32, commutative + associative, """
+binop("usadd_4x8", tint32, _2src_commutative + associative, """
dst = 0;
for (int i = 0; i < 32; i += 8) {
dst |= MIN2(((src0 >> i) & 0xff) + ((src1 >> i) & 0xff), 0xff) << i;
""")
# vector min for 4 8bit ints.
-binop("umin_4x8", tint32, commutative + associative, """
+binop("umin_4x8", tint32, _2src_commutative + associative, """
dst = 0;
for (int i = 0; i < 32; i += 8) {
dst |= MIN2((src0 >> i) & 0xff, (src1 >> i) & 0xff) << i;
""")
# vector max for 4 8bit ints.
-binop("umax_4x8", tint32, commutative + associative, """
+binop("umax_4x8", tint32, _2src_commutative + associative, """
dst = 0;
for (int i = 0; i < 32; i += 8) {
dst |= MAX2((src0 >> i) & 0xff, (src1 >> i) & 0xff) << i;
""")
# unorm multiply: (a * b) / 255.
-binop("umul_unorm_4x8", tint32, commutative + associative, """
+binop("umul_unorm_4x8", tint32, _2src_commutative + associative, """
dst = 0;
for (int i = 0; i < 32; i += 8) {
int src0_chan = (src0 >> i) & 0xff;
"src0 | ((uint32_t)src1 << 16)")
# bfm implements the behavior of the first operation of the SM5 "bfi" assembly
-# and that of the "bfi1" i965 instruction. That is, it has undefined behavior
-# if either of its arguments are 32.
+# and that of the "bfi1" i965 instruction. That is, the bits and offset values
+# are from the low five bits of src0 and src1, respectively.
binop_convert("bfm", tuint32, tint32, "", """
-int bits = src0, offset = src1;
-if (offset < 0 || bits < 0 || offset > 31 || bits > 31 || offset + bits > 32)
- dst = 0; /* undefined */
-else
- dst = ((1u << bits) - 1) << offset;
+int bits = src0 & 0x1F;
+int offset = src1 & 0x1F;
+dst = ((1u << bits) - 1) << offset;
""")
opcode("ldexp", 0, tfloat, [0, 0], [tfloat, tint32], False, "", """
binop("extract_i16", tint, "", "(int16_t)(src0 >> (src1 * 16))")
-def triop(name, ty, const_expr):
- opcode(name, 0, ty, [0, 0, 0], [ty, ty, ty], False, "", const_expr)
+def triop(name, ty, alg_props, const_expr):
+ opcode(name, 0, ty, [0, 0, 0], [ty, ty, ty], False, alg_props, const_expr)
def triop_horiz(name, output_size, src1_size, src2_size, src3_size, const_expr):
opcode(name, output_size, tuint,
[src1_size, src2_size, src3_size],
[tuint, tuint, tuint], False, "", const_expr)
-triop("ffma", tfloat, "src0 * src1 + src2")
+triop("ffma", tfloat, _2src_commutative, """
+if (nir_is_rounding_mode_rtz(execution_mode, bit_size)) {
+ if (bit_size == 64)
+ dst = _mesa_double_fma_rtz(src0, src1, src2);
+ else if (bit_size == 32)
+ dst = _mesa_float_fma_rtz(src0, src1, src2);
+ else
+ dst = _mesa_double_to_float_rtz(_mesa_double_fma_rtz(src0, src1, src2));
+} else {
+ if (bit_size == 32)
+ dst = fmaf(src0, src1, src2);
+ else
+ dst = fma(src0, src1, src2);
+}
+""")
-triop("flrp", tfloat, "src0 * (1 - src2) + src1 * src2")
+triop("flrp", tfloat, "", "src0 * (1 - src2) + src1 * src2")
# Conditional Select
#
# bools (0.0 vs 1.0) and one for integer bools (0 vs ~0).
-triop("fcsel", tfloat32, "(src0 != 0.0f) ? src1 : src2")
+triop("fcsel", tfloat32, "", "(src0 != 0.0f) ? src1 : src2")
# 3 way min/max/med
-triop("fmin3", tfloat, "fminf(src0, fminf(src1, src2))")
-triop("imin3", tint, "MIN2(src0, MIN2(src1, src2))")
-triop("umin3", tuint, "MIN2(src0, MIN2(src1, src2))")
+triop("fmin3", tfloat, "", "fminf(src0, fminf(src1, src2))")
+triop("imin3", tint, "", "MIN2(src0, MIN2(src1, src2))")
+triop("umin3", tuint, "", "MIN2(src0, MIN2(src1, src2))")
-triop("fmax3", tfloat, "fmaxf(src0, fmaxf(src1, src2))")
-triop("imax3", tint, "MAX2(src0, MAX2(src1, src2))")
-triop("umax3", tuint, "MAX2(src0, MAX2(src1, src2))")
+triop("fmax3", tfloat, "", "fmaxf(src0, fmaxf(src1, src2))")
+triop("imax3", tint, "", "MAX2(src0, MAX2(src1, src2))")
+triop("umax3", tuint, "", "MAX2(src0, MAX2(src1, src2))")
-triop("fmed3", tfloat, "fmaxf(fminf(fmaxf(src0, src1), src2), fminf(src0, src1))")
-triop("imed3", tint, "MAX2(MIN2(MAX2(src0, src1), src2), MIN2(src0, src1))")
-triop("umed3", tuint, "MAX2(MIN2(MAX2(src0, src1), src2), MIN2(src0, src1))")
+triop("fmed3", tfloat, "", "fmaxf(fminf(fmaxf(src0, src1), src2), fminf(src0, src1))")
+triop("imed3", tint, "", "MAX2(MIN2(MAX2(src0, src1), src2), MIN2(src0, src1))")
+triop("umed3", tuint, "", "MAX2(MIN2(MAX2(src0, src1), src2), MIN2(src0, src1))")
opcode("bcsel", 0, tuint, [0, 0, 0],
- [tbool1, tuint, tuint], False, "", "src0 ? src1 : src2")
+ [tbool1, tuint, tuint], False, "", "src0 ? src1 : src2")
+opcode("b8csel", 0, tuint, [0, 0, 0],
+ [tbool8, tuint, tuint], False, "", "src0 ? src1 : src2")
+opcode("b16csel", 0, tuint, [0, 0, 0],
+ [tbool16, tuint, tuint], False, "", "src0 ? src1 : src2")
opcode("b32csel", 0, tuint, [0, 0, 0],
[tbool32, tuint, tuint], False, "", "src0 ? src1 : src2")
# SM5 bfi assembly
-triop("bfi", tuint32, """
+triop("bfi", tuint32, "", """
unsigned mask = src0, insert = src1, base = src2;
if (mask == 0) {
dst = base;
}
""")
-# SM5 ubfe/ibfe assembly
+
+triop("bitfield_select", tuint, "", "(src0 & src1) | (~src0 & src2)")
+
+# SM5 ubfe/ibfe assembly: only the 5 least significant bits of offset and bits are used.
opcode("ubfe", 0, tuint32,
- [0, 0, 0], [tuint32, tint32, tint32], False, "", """
+ [0, 0, 0], [tuint32, tuint32, tuint32], False, "", """
unsigned base = src0;
-int offset = src1, bits = src2;
+unsigned offset = src1 & 0x1F;
+unsigned bits = src2 & 0x1F;
if (bits == 0) {
dst = 0;
-} else if (bits < 0 || offset < 0) {
- dst = 0; /* undefined */
} else if (offset + bits < 32) {
dst = (base << (32 - bits - offset)) >> (32 - bits);
} else {
}
""")
opcode("ibfe", 0, tint32,
- [0, 0, 0], [tint32, tint32, tint32], False, "", """
+ [0, 0, 0], [tint32, tuint32, tuint32], False, "", """
int base = src0;
-int offset = src1, bits = src2;
+unsigned offset = src1 & 0x1F;
+unsigned bits = src2 & 0x1F;
if (bits == 0) {
dst = 0;
-} else if (bits < 0 || offset < 0) {
- dst = 0; /* undefined */
} else if (offset + bits < 32) {
dst = (base << (32 - bits - offset)) >> (32 - bits);
} else {
dst.w = src3.x;
""")
+# An integer multiply instruction for address calculation. This is
+# similar to imul, except that the results are undefined in case of
+# overflow. Overflow is defined according to the size of the variable
+# being dereferenced.
+#
+# This relaxed definition, compared to imul, allows an optimization
+# pass to propagate bounds (ie, from an load/store intrinsic) to the
+# sources, such that lower precision integer multiplies can be used.
+# This is useful on hw that has 24b or perhaps 16b integer multiply
+# instructions.
+binop("amul", tint, _2src_commutative + associative, "src0 * src1")
+
+# ir3-specific instruction that maps directly to mul-add shift high mix,
+# (IMADSH_MIX16 i.e. ah * bl << 16 + c). It is used for lowering integer
+# multiplication (imul) on Freedreno backend..
+opcode("imadsh_mix16", 1, tint32,
+ [1, 1, 1], [tint32, tint32, tint32], False, "", """
+dst.x = ((((src0.x & 0xffff0000) >> 16) * (src1.x & 0x0000ffff)) << 16) + src2.x;
+""")
+
+# ir3-specific instruction that maps directly to ir3 mad.s24.
+#
+# 24b multiply into 32b result (with sign extension) plus 32b int
+triop("imad24_ir3", tint32, _2src_commutative,
+ "(((int32_t)src0 << 8) >> 8) * (((int32_t)src1 << 8) >> 8) + src2")
+# 24b multiply into 32b result (with sign extension)
+binop("imul24", tint32, _2src_commutative + associative,
+ "(((int32_t)src0 << 8) >> 8) * (((int32_t)src1 << 8) >> 8)")