nir: Fix interaction of GL_CLAMP lowering with texture offsets.

[mesa.git] / src / compiler / nir / nir_opcodes_c.py

diff --git a/src/compiler/nir/nir_opcodes_c.py b/src/compiler/nir/nir_opcodes_c.py
index 7049c5be6768ae4f336db01085bd9fab4a989fce..c19185534af06f3fe6b563218e95abfd02b026bf 100644 (file)
--- a/src/compiler/nir/nir_opcodes_c.py
+++ b/src/compiler/nir/nir_opcodes_c.py
@@ -1,4 +1,3 @@
-#! /usr/bin/env python
 #
 # Copyright (C) 2014 Connor Abbott
 #
@@ -30,6 +29,85 @@ from mako.template import Template
 template = Template("""
 #include "nir.h"
 
+nir_op
+nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, nir_rounding_mode rnd)
+{
+   nir_alu_type src_base = (nir_alu_type) nir_alu_type_get_base_type(src);
+   nir_alu_type dst_base = (nir_alu_type) nir_alu_type_get_base_type(dst);
+   unsigned src_bit_size = nir_alu_type_get_type_size(src);
+   unsigned dst_bit_size = nir_alu_type_get_type_size(dst);
+
+   if (src == dst && src_base == nir_type_float) {
+      return nir_op_fmov;
+   } else if ((src_base == nir_type_int || src_base == nir_type_uint) &&
+              (dst_base == nir_type_int || dst_base == nir_type_uint) &&
+              src_bit_size == dst_bit_size) {
+      /* Integer <-> integer conversions with the same bit-size on both
+       * ends are just no-op moves.
+       */
+      return nir_op_imov;
+   }
+
+   switch (src_base) {
+%     for src_t in ['int', 'uint', 'float']:
+      case nir_type_${src_t}:
+         switch (dst_base) {
+%           for dst_t in ['int', 'uint', 'float']:
+            case nir_type_${dst_t}:
+%              if src_t in ['int', 'uint'] and dst_t in ['int', 'uint']:
+%                 if dst_t == 'int':
+<%                   continue %>
+%                 else:
+<%                   dst_t = src_t %>
+%                 endif
+%              endif
+               switch (dst_bit_size) {
+%                 for dst_bits in [16, 32, 64]:
+                  case ${dst_bits}:
+%                    if src_t == 'float' and dst_t == 'float' and dst_bits == 16:
+                     switch(rnd) {
+%                       for rnd_t in ['rtne', 'rtz', 'undef']:
+                        case nir_rounding_mode_${rnd_t}:
+                           return ${'nir_op_{0}2{1}{2}_{3}'.format(src_t[0], dst_t[0],
+                                                                   dst_bits, rnd_t)};
+%                       endfor
+                        default:
+                           unreachable("Invalid 16-bit nir rounding mode");
+                     }
+%                    else:
+                     assert(rnd == nir_rounding_mode_undef);
+                     return ${'nir_op_{0}2{1}{2}'.format(src_t[0], dst_t[0], dst_bits)};
+%                    endif
+%                 endfor
+                  default:
+                     unreachable("Invalid nir alu bit size");
+               }
+%           endfor
+            case nir_type_bool:
+%              if src_t == 'float':
+                  return nir_op_f2b;
+%              else:
+                  return nir_op_i2b;
+%              endif
+            default:
+               unreachable("Invalid nir alu base type");
+         }
+%     endfor
+      case nir_type_bool:
+         switch (dst_base) {
+            case nir_type_int:
+            case nir_type_uint:
+               return nir_op_b2i;
+            case nir_type_float:
+               return nir_op_b2f;
+            default:
+               unreachable("Invalid nir alu base type");
+         }
+      default:
+         unreachable("Invalid nir alu base type");
+   }
+}
+
 const nir_op_info nir_op_infos[nir_num_opcodes] = {
 % for name, opcode in sorted(opcodes.iteritems()):
 {