i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's type

[mesa.git] / src / compiler / nir / nir_opt_undef.c

diff --git a/src/compiler/nir/nir_opt_undef.c b/src/compiler/nir/nir_opt_undef.c
index c4777a86c8f3cb26eab3dc7c78492b80e65a396f..8d3210c637e0232b4125fdba5d37e620a33c4dd1 100644 (file)
--- a/src/compiler/nir/nir_opt_undef.c
+++ b/src/compiler/nir/nir_opt_undef.c
@@ -79,22 +79,22 @@ opt_undef_vecN(nir_builder *b, nir_alu_instr *alu)
 {
    if (alu->op != nir_op_vec2 &&
        alu->op != nir_op_vec3 &&
-       alu->op != nir_op_vec4)
+       alu->op != nir_op_vec4 &&
+       alu->op != nir_op_fmov &&
+       alu->op != nir_op_imov)
       return false;
 
    assert(alu->dest.dest.is_ssa);
 
-   unsigned num_components = nir_op_infos[alu->op].num_inputs;
-
-   for (unsigned i = 0; i < num_components; i++) {
+   for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
       if (!alu->src[i].src.is_ssa ||
           alu->src[i].src.ssa->parent_instr->type != nir_instr_type_ssa_undef)
          return false;
    }
 
    b->cursor = nir_before_instr(&alu->instr);
-   nir_ssa_def *undef =
-      nir_ssa_undef(b, num_components, nir_dest_bit_size(alu->dest.dest));
+   nir_ssa_def *undef = nir_ssa_undef(b, alu->dest.dest.ssa.num_components,
+                                      nir_dest_bit_size(alu->dest.dest));
    nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, nir_src_for_ssa(undef));
 
    return true;