#ifndef SHADER_ENUMS_H
#define SHADER_ENUMS_H
+#include <stdbool.h>
+
+/* Project-wide (GL and Vulkan) maximum. */
+#define MAX_DRAW_BUFFERS 8
+
#ifdef __cplusplus
extern "C" {
#endif
MESA_SHADER_GEOMETRY = 3,
MESA_SHADER_FRAGMENT = 4,
MESA_SHADER_COMPUTE = 5,
+ /* must be last so it doesn't affect the GL pipeline */
+ MESA_SHADER_KERNEL = 6,
} gl_shader_stage;
+static inline bool
+gl_shader_stage_is_compute(gl_shader_stage stage)
+{
+ return stage == MESA_SHADER_COMPUTE || stage == MESA_SHADER_KERNEL;
+}
+
+/**
+ * Number of STATE_* values we need to address any GL state.
+ * Used to dimension arrays.
+ */
+#define STATE_LENGTH 5
+
+typedef short gl_state_index16; /* see enum gl_state_index */
+
const char *gl_shader_stage_name(gl_shader_stage stage);
/**
*/
const char *_mesa_shader_stage_to_abbrev(unsigned stage);
+/**
+ * GL related stages (not including CL)
+ */
#define MESA_SHADER_STAGES (MESA_SHADER_COMPUTE + 1)
+/**
+ * All stages
+ */
+#define MESA_ALL_SHADER_STAGES (MESA_SHADER_KERNEL + 1)
+
/**
* Indexes for vertex program attributes.
* VERT_ATTRIB_GENERIC
* include the OpenGL 2.0+ GLSL generic shader attributes.
* These alias the generic GL_ARB_vertex_shader attributes.
+ * VERT_ATTRIB_MAT
+ * include the generic shader attributes used to alias
+ * varying material values for the TNL shader programs.
+ * They are located at the end of the generic attribute
+ * block not to overlap with the generic 0 attribute.
*/
#define VERT_ATTRIB_FF(i) (VERT_ATTRIB_POS + (i))
#define VERT_ATTRIB_FF_MAX VERT_ATTRIB_GENERIC0
#define VERT_ATTRIB_GENERIC(i) (VERT_ATTRIB_GENERIC0 + (i))
#define VERT_ATTRIB_GENERIC_MAX MAX_VERTEX_GENERIC_ATTRIBS
+#define VERT_ATTRIB_MAT0 \
+ (VERT_ATTRIB_GENERIC_MAX - VERT_ATTRIB_MAT_MAX)
+#define VERT_ATTRIB_MAT(i) \
+ VERT_ATTRIB_GENERIC((i) + VERT_ATTRIB_MAT0)
+#define VERT_ATTRIB_MAT_MAX MAT_ATTRIB_MAX
+
/**
* Bitflags for vertex attributes.
* These are used in bitfields in many places.
#define VERT_BIT_GENERIC(i) VERT_BIT(VERT_ATTRIB_GENERIC(i))
#define VERT_BIT_GENERIC_ALL \
BITFIELD_RANGE(VERT_ATTRIB_GENERIC(0), VERT_ATTRIB_GENERIC_MAX)
+
+#define VERT_BIT_MAT(i) VERT_BIT(VERT_ATTRIB_MAT(i))
+#define VERT_BIT_MAT_ALL \
+ BITFIELD_RANGE(VERT_ATTRIB_MAT(0), VERT_ATTRIB_MAT_MAX)
/*@}*/
#define MAX_VARYING 32 /**< number of float[4] vectors */
VARYING_SLOT_BOUNDING_BOX0, /* Only appears as TCS output. */
VARYING_SLOT_BOUNDING_BOX1, /* Only appears as TCS output. */
VARYING_SLOT_VIEW_INDEX,
+ VARYING_SLOT_VIEWPORT_MASK, /* Does not appear in FS */
VARYING_SLOT_VAR0, /* First generic varying slot */
/* the remaining are simply for the benefit of gl_varying_slot_name()
* and not to be construed as an upper bound:
#define VARYING_BIT_PSIZ BITFIELD64_BIT(VARYING_SLOT_PSIZ)
#define VARYING_BIT_BFC0 BITFIELD64_BIT(VARYING_SLOT_BFC0)
#define VARYING_BIT_BFC1 BITFIELD64_BIT(VARYING_SLOT_BFC1)
+#define VARYING_BITS_COLOR (VARYING_BIT_COL0 | \
+ VARYING_BIT_COL1 | \
+ VARYING_BIT_BFC0 | \
+ VARYING_BIT_BFC1)
#define VARYING_BIT_EDGE BITFIELD64_BIT(VARYING_SLOT_EDGE)
#define VARYING_BIT_CLIP_VERTEX BITFIELD64_BIT(VARYING_SLOT_CLIP_VERTEX)
#define VARYING_BIT_CLIP_DIST0 BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0)
#define VARYING_BIT_TESS_LEVEL_INNER BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_INNER)
#define VARYING_BIT_BOUNDING_BOX0 BITFIELD64_BIT(VARYING_SLOT_BOUNDING_BOX0)
#define VARYING_BIT_BOUNDING_BOX1 BITFIELD64_BIT(VARYING_SLOT_BOUNDING_BOX1)
+#define VARYING_BIT_VIEWPORT_MASK BITFIELD64_BIT(VARYING_SLOT_VIEWPORT_MASK)
#define VARYING_BIT_VAR(V) BITFIELD64_BIT(VARYING_SLOT_VAR0 + (V))
/*@}*/
SYSTEM_VALUE_SUBGROUP_LT_MASK,
/*@}*/
+ /**
+ * Builtin variables added by VK_KHR_subgroups
+ */
+ /*@{*/
+ SYSTEM_VALUE_NUM_SUBGROUPS,
+ SYSTEM_VALUE_SUBGROUP_ID,
+ /*@}*/
+
/*@}*/
/**
*/
SYSTEM_VALUE_BASE_VERTEX,
+ /**
+ * Depending on the type of the draw call (indexed or non-indexed),
+ * is the value of \c basevertex passed to \c glDrawElementsBaseVertex and
+ * similar, or is the value of \c first passed to \c glDrawArrays and
+ * similar.
+ *
+ * \note
+ * It can be used to calculate the \c SYSTEM_VALUE_VERTEX_ID as
+ * \c SYSTEM_VALUE_VERTEX_ID_ZERO_BASE plus \c SYSTEM_VALUE_FIRST_VERTEX.
+ *
+ * \sa SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, SYSTEM_VALUE_VERTEX_ID
+ */
+ SYSTEM_VALUE_FIRST_VERTEX,
+
+ /**
+ * If the Draw command used to start the rendering was an indexed draw
+ * or not (~0/0). Useful to calculate \c SYSTEM_VALUE_BASE_VERTEX as
+ * \c SYSTEM_VALUE_IS_INDEXED_DRAW & \c SYSTEM_VALUE_FIRST_VERTEX.
+ */
+ SYSTEM_VALUE_IS_INDEXED_DRAW,
+
/**
* Value of \c baseinstance passed to instanced draw entry points
*
*/
/*@{*/
SYSTEM_VALUE_FRAG_COORD,
+ SYSTEM_VALUE_POINT_COORD,
SYSTEM_VALUE_FRONT_FACE,
SYSTEM_VALUE_SAMPLE_ID,
SYSTEM_VALUE_SAMPLE_POS,
SYSTEM_VALUE_SAMPLE_MASK_IN,
SYSTEM_VALUE_HELPER_INVOCATION,
+ SYSTEM_VALUE_COLOR0,
+ SYSTEM_VALUE_COLOR1,
/*@}*/
/**
SYSTEM_VALUE_PRIMITIVE_ID,
SYSTEM_VALUE_TESS_LEVEL_OUTER, /**< TES input */
SYSTEM_VALUE_TESS_LEVEL_INNER, /**< TES input */
+ SYSTEM_VALUE_TESS_LEVEL_OUTER_DEFAULT, /**< TCS input for passthru TCS */
+ SYSTEM_VALUE_TESS_LEVEL_INNER_DEFAULT, /**< TCS input for passthru TCS */
/*@}*/
/**
SYSTEM_VALUE_LOCAL_INVOCATION_ID,
SYSTEM_VALUE_LOCAL_INVOCATION_INDEX,
SYSTEM_VALUE_GLOBAL_INVOCATION_ID,
+ SYSTEM_VALUE_GLOBAL_INVOCATION_INDEX,
SYSTEM_VALUE_WORK_GROUP_ID,
SYSTEM_VALUE_NUM_WORK_GROUPS,
SYSTEM_VALUE_LOCAL_GROUP_SIZE,
+ SYSTEM_VALUE_GLOBAL_GROUP_SIZE,
+ SYSTEM_VALUE_WORK_DIM,
+ SYSTEM_VALUE_USER_DATA_AMD,
/*@}*/
+ /** Required for VK_KHR_device_group */
+ SYSTEM_VALUE_DEVICE_INDEX,
+
/** Required for VK_KHX_multiview */
SYSTEM_VALUE_VIEW_INDEX,
*/
SYSTEM_VALUE_VERTEX_CNT,
+ /**
+ * Required for AMD_shader_explicit_vertex_parameter and also used for
+ * varying-fetch instructions.
+ *
+ * The _SIZE value is "primitive size", used to scale i/j in primitive
+ * space to pixel space.
+ */
+ SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL,
+ SYSTEM_VALUE_BARYCENTRIC_PERSP_SAMPLE,
+ SYSTEM_VALUE_BARYCENTRIC_PERSP_CENTROID,
+ SYSTEM_VALUE_BARYCENTRIC_PERSP_SIZE,
+ SYSTEM_VALUE_BARYCENTRIC_LINEAR_PIXEL,
+ SYSTEM_VALUE_BARYCENTRIC_LINEAR_CENTROID,
+ SYSTEM_VALUE_BARYCENTRIC_LINEAR_SAMPLE,
+ SYSTEM_VALUE_BARYCENTRIC_PULL_MODEL,
+
+ /**
+ * IR3 specific geometry shader and tesselation control shader system
+ * values that packs invocation id, thread id and vertex id. Having this
+ * as a nir level system value lets us do the unpacking in nir.
+ */
+ SYSTEM_VALUE_GS_HEADER_IR3,
+ SYSTEM_VALUE_TCS_HEADER_IR3,
+
SYSTEM_VALUE_MAX /**< Number of values */
} gl_system_value;
INTERP_MODE_SMOOTH,
INTERP_MODE_FLAT,
INTERP_MODE_NOPERSPECTIVE,
+ INTERP_MODE_EXPLICIT,
INTERP_MODE_COUNT /**< Number of interpolation qualifiers */
};
/**
* \brief Buffer access qualifiers
*/
-enum gl_buffer_access_qualifier
+enum gl_access_qualifier
{
- ACCESS_COHERENT = 1,
- ACCESS_RESTRICT = 2,
- ACCESS_VOLATILE = 4,
+ ACCESS_COHERENT = (1 << 0),
+ ACCESS_RESTRICT = (1 << 1),
+ ACCESS_VOLATILE = (1 << 2),
+ ACCESS_NON_READABLE = (1 << 3),
+ ACCESS_NON_WRITEABLE = (1 << 4),
+
+ /** The access may use a non-uniform buffer or image index */
+ ACCESS_NON_UNIFORM = (1 << 5),
+
+ /* This has the same semantics as NIR_INTRINSIC_CAN_REORDER, only to be
+ * used with loads. In other words, it means that the load can be
+ * arbitrarily reordered, or combined with other loads to the same address.
+ * It is implied by ACCESS_NON_WRITEABLE together with ACCESS_RESTRICT, and
+ * a lack of ACCESS_COHERENT and ACCESS_VOLATILE.
+ */
+ ACCESS_CAN_REORDER = (1 << 6),
+
+ /** Use as little cache space as possible. */
+ ACCESS_STREAM_CACHE_POLICY = (1 << 7),
};
/**
BLEND_ALL = 0x7fff,
};
+enum blend_func
+{
+ BLEND_FUNC_ADD,
+ BLEND_FUNC_SUBTRACT,
+ BLEND_FUNC_REVERSE_SUBTRACT,
+ BLEND_FUNC_MIN,
+ BLEND_FUNC_MAX,
+};
+
+enum blend_factor
+{
+ BLEND_FACTOR_ZERO,
+ BLEND_FACTOR_SRC_COLOR,
+ BLEND_FACTOR_DST_COLOR,
+ BLEND_FACTOR_SRC_ALPHA,
+ BLEND_FACTOR_DST_ALPHA,
+ BLEND_FACTOR_CONSTANT_COLOR,
+ BLEND_FACTOR_CONSTANT_ALPHA,
+ BLEND_FACTOR_SRC_ALPHA_SATURATE,
+};
+
enum gl_tess_spacing
{
TESS_SPACING_UNSPECIFIED,
COMPARE_FUNC_ALWAYS,
};
+/**
+ * Arrangements for grouping invocations from NV_compute_shader_derivatives.
+ *
+ * The extension provides new layout qualifiers that support two different
+ * arrangements of compute shader invocations for the purpose of derivative
+ * computation. When specifying
+ *
+ * layout(derivative_group_quadsNV) in;
+ *
+ * compute shader invocations are grouped into 2x2x1 arrays whose four local
+ * invocation ID values follow the pattern:
+ *
+ * +-----------------+------------------+
+ * | (2x+0, 2y+0, z) | (2x+1, 2y+0, z) |
+ * +-----------------+------------------+
+ * | (2x+0, 2y+1, z) | (2x+1, 2y+1, z) |
+ * +-----------------+------------------+
+ *
+ * where Y increases from bottom to top. When specifying
+ *
+ * layout(derivative_group_linearNV) in;
+ *
+ * compute shader invocations are grouped into 2x2x1 arrays whose four local
+ * invocation index values follow the pattern:
+ *
+ * +------+------+
+ * | 4n+0 | 4n+1 |
+ * +------+------+
+ * | 4n+2 | 4n+3 |
+ * +------+------+
+ *
+ * If neither layout qualifier is specified, derivatives in compute shaders
+ * return zero, which is consistent with the handling of built-in texture
+ * functions like texture() in GLSL 4.50 compute shaders.
+ */
+enum gl_derivative_group {
+ DERIVATIVE_GROUP_NONE = 0,
+ DERIVATIVE_GROUP_QUADS,
+ DERIVATIVE_GROUP_LINEAR,
+};
+
+enum float_controls
+{
+ FLOAT_CONTROLS_DEFAULT_FLOAT_CONTROL_MODE = 0x0000,
+ FLOAT_CONTROLS_DENORM_PRESERVE_FP16 = 0x0001,
+ FLOAT_CONTROLS_DENORM_PRESERVE_FP32 = 0x0002,
+ FLOAT_CONTROLS_DENORM_PRESERVE_FP64 = 0x0004,
+ FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16 = 0x0008,
+ FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32 = 0x0010,
+ FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64 = 0x0020,
+ FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16 = 0x0040,
+ FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32 = 0x0080,
+ FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64 = 0x0100,
+ FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16 = 0x0200,
+ FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32 = 0x0400,
+ FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64 = 0x0800,
+ FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16 = 0x1000,
+ FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32 = 0x2000,
+ FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64 = 0x4000,
+};
+
#ifdef __cplusplus
} /* extern "C" */
#endif