switch (glsl_get_base_type(type)) {
case GLSL_TYPE_INT:
case GLSL_TYPE_UINT:
+ case GLSL_TYPE_INT64:
+ case GLSL_TYPE_UINT64:
case GLSL_TYPE_BOOL:
case GLSL_TYPE_FLOAT:
case GLSL_TYPE_DOUBLE: {
switch (glsl_get_base_type(src->type)) {
case GLSL_TYPE_INT:
case GLSL_TYPE_UINT:
+ case GLSL_TYPE_INT64:
+ case GLSL_TYPE_UINT64:
case GLSL_TYPE_BOOL:
case GLSL_TYPE_FLOAT:
case GLSL_TYPE_DOUBLE:
val->type->type = glsl_bool_type();
break;
case SpvOpTypeInt: {
+ int bit_size = w[2];
const bool signedness = w[3];
- val->type->type = (signedness ? glsl_int_type() : glsl_uint_type());
+ if (bit_size == 64)
+ val->type->type = (signedness ? glsl_int64_t_type() : glsl_uint64_t_type());
+ else
+ val->type->type = (signedness ? glsl_int_type() : glsl_uint_type());
break;
}
case SpvOpTypeFloat: {
switch (glsl_get_base_type(type)) {
case GLSL_TYPE_INT:
case GLSL_TYPE_UINT:
+ case GLSL_TYPE_INT64:
+ case GLSL_TYPE_UINT64:
case GLSL_TYPE_BOOL:
case GLSL_TYPE_FLOAT:
case GLSL_TYPE_DOUBLE:
switch (glsl_get_base_type(val->const_type)) {
case GLSL_TYPE_UINT:
case GLSL_TYPE_INT:
+ case GLSL_TYPE_UINT64:
+ case GLSL_TYPE_INT64:
case GLSL_TYPE_FLOAT:
case GLSL_TYPE_BOOL:
case GLSL_TYPE_DOUBLE: {
glsl_get_bit_size(v1->type->type);
assert(bit_size == bit_size0 && bit_size == bit_size1);
+ (void)bit_size0; (void)bit_size1;
if (bit_size == 64) {
uint64_t u64[8];
switch (glsl_get_base_type(type)) {
case GLSL_TYPE_UINT:
case GLSL_TYPE_INT:
+ case GLSL_TYPE_UINT64:
+ case GLSL_TYPE_INT64:
case GLSL_TYPE_FLOAT:
case GLSL_TYPE_DOUBLE:
case GLSL_TYPE_BOOL:
switch (glsl_get_base_type(type)) {
case GLSL_TYPE_INT:
case GLSL_TYPE_UINT:
+ case GLSL_TYPE_INT64:
+ case GLSL_TYPE_UINT64:
case GLSL_TYPE_BOOL:
case GLSL_TYPE_FLOAT:
case GLSL_TYPE_DOUBLE:
coord_components++;
coord = vtn_ssa_value(b, w[idx++])->def;
- p->src = nir_src_for_ssa(coord);
+ p->src = nir_src_for_ssa(nir_channels(&b->nb, coord,
+ (1 << coord_components) - 1));
p->src_type = nir_tex_src_coord;
p++;
break;
if (opcode != SpvOpImageWrite) {
struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa);
struct vtn_type *type = vtn_value(b, w[1], vtn_value_type_type)->type;
- nir_ssa_dest_init(&intrin->instr, &intrin->dest, 4, 32, NULL);
+
+ unsigned dest_components =
+ nir_intrinsic_infos[intrin->intrinsic].dest_components;
+ if (intrin->intrinsic == nir_intrinsic_image_size) {
+ dest_components = intrin->num_components =
+ glsl_get_vector_elements(type->type);
+ }
+
+ nir_ssa_dest_init(&intrin->instr, &intrin->dest,
+ dest_components, 32, NULL);
nir_builder_instr_insert(&b->nb, &intrin->instr);
- /* The image intrinsics always return 4 channels but we may not want
- * that many. Emit a mov to trim it down.
- */
- unsigned swiz[4] = {0, 1, 2, 3};
val->ssa = vtn_create_ssa_value(b, type->type);
- val->ssa->def = nir_swizzle(&b->nb, &intrin->dest.ssa, swiz,
- glsl_get_vector_elements(type->type), false);
+ val->ssa->def = &intrin->dest.ssa;
} else {
nir_builder_instr_insert(&b->nb, &intrin->instr);
}
case SpvCapabilityVector16:
case SpvCapabilityFloat16Buffer:
case SpvCapabilityFloat16:
- case SpvCapabilityInt64:
case SpvCapabilityInt64Atomics:
case SpvCapabilityAtomicStorage:
case SpvCapabilityInt16:
case SpvCapabilityFloat64:
spv_check_supported(float64, cap);
break;
+ case SpvCapabilityInt64:
+ spv_check_supported(int64, cap);
+ break;
case SpvCapabilityAddresses:
case SpvCapabilityKernel: