X86: Set up a named constant for the "fold bit" for int register indices.

[gem5.git] / src / cpu / BaseCPU.py

diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 985c415a0d84d1008bb35c02b05948a0dc1babc8..4661375ba4486bbcba38c60c9cfe22b71e035ac0 100644 (file)
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -42,19 +42,19 @@ if build_env['TARGET_ISA'] == 'alpha':
     if build_env['FULL_SYSTEM']:
         from AlphaInterrupts import AlphaInterrupts
 elif build_env['TARGET_ISA'] == 'sparc':
-    from SparcTLB import SparcDTB, SparcITB
+    from SparcTLB import SparcTLB
     if build_env['FULL_SYSTEM']:
         from SparcInterrupts import SparcInterrupts
 elif build_env['TARGET_ISA'] == 'x86':
-    from X86TLB import X86DTB, X86ITB
+    from X86TLB import X86TLB
     if build_env['FULL_SYSTEM']:
         from X86LocalApic import X86LocalApic
 elif build_env['TARGET_ISA'] == 'mips':
-    from MipsTLB import MipsTLB,MipsDTB, MipsITB, MipsUTB
+    from MipsTLB import MipsTLB
     if build_env['FULL_SYSTEM']:
         from MipsInterrupts import MipsInterrupts
 elif build_env['TARGET_ISA'] == 'arm':
-    from ArmTLB import ArmTLB, ArmDTB, ArmITB, ArmUTB
+    from ArmTLB import ArmTLB
     if build_env['FULL_SYSTEM']:
         from ArmInterrupts import ArmInterrupts
 
@@ -69,7 +69,7 @@ class BaseCPU(MemObject):
     function_trace = Param.Bool(False, "Enable function trace")
     function_trace_start = Param.Tick(0, "Cycle to start function trace")
 
-    checker = Param.BaseCPU("checker CPU")
+    checker = Param.BaseCPU(NULL, "checker CPU")
 
     do_checkpoint_insts = Param.Bool(True,
         "enable checkpoint pseudo instructions")
@@ -83,37 +83,34 @@ class BaseCPU(MemObject):
         workload = VectorParam.Process("processes to run")
 
     if build_env['TARGET_ISA'] == 'sparc':
-        dtb = Param.SparcDTB(SparcDTB(), "Data TLB")
-        itb = Param.SparcITB(SparcITB(), "Instruction TLB")
+        dtb = Param.SparcTLB(SparcTLB(), "Data TLB")
+        itb = Param.SparcTLB(SparcTLB(), "Instruction TLB")
         if build_env['FULL_SYSTEM']:
             interrupts = Param.SparcInterrupts(
                 SparcInterrupts(), "Interrupt Controller")
     elif build_env['TARGET_ISA'] == 'alpha':
-        dtb = Param.AlphaDTB(AlphaDTB(), "Data TLB")
-        itb = Param.AlphaITB(AlphaITB(), "Instruction TLB")
+        dtb = Param.AlphaTLB(AlphaDTB(), "Data TLB")
+        itb = Param.AlphaTLB(AlphaITB(), "Instruction TLB")
         if build_env['FULL_SYSTEM']:
             interrupts = Param.AlphaInterrupts(
                 AlphaInterrupts(), "Interrupt Controller")
     elif build_env['TARGET_ISA'] == 'x86':
-        dtb = Param.X86DTB(X86DTB(), "Data TLB")
-        itb = Param.X86ITB(X86ITB(), "Instruction TLB")
+        dtb = Param.X86TLB(X86TLB(), "Data TLB")
+        itb = Param.X86TLB(X86TLB(), "Instruction TLB")
         if build_env['FULL_SYSTEM']:
             _localApic = X86LocalApic(pio_addr=0x2000000000000000)
             interrupts = \
                 Param.X86LocalApic(_localApic, "Interrupt Controller")
     elif build_env['TARGET_ISA'] == 'mips':
-        UnifiedTLB = Param.Bool(True, "Is this a Unified TLB?")
-        dtb = Param.MipsDTB(MipsDTB(), "Data TLB")
-        itb = Param.MipsITB(MipsITB(), "Instruction TLB")
-        tlb = Param.MipsUTB(MipsUTB(), "Unified TLB")
+        dtb = Param.MipsTLB(MipsTLB(), "Data TLB")
+        itb = Param.MipsTLB(MipsTLB(), "Instruction TLB")
         if build_env['FULL_SYSTEM']:
             interrupts = Param.MipsInterrupts(
                     MipsInterrupts(), "Interrupt Controller")
     elif build_env['TARGET_ISA'] == 'arm':
         UnifiedTLB = Param.Bool(True, "Is this a Unified TLB?")
-        dtb = Param.ArmDTB(ArmDTB(), "Data TLB")
-        itb = Param.ArmITB(ArmITB(), "Instruction TLB")
-        tlb = Param.ArmUTB(ArmUTB(), "Unified TLB")
+        dtb = Param.ArmTLB(ArmTLB(), "Data TLB")
+        itb = Param.ArmTLB(ArmTLB(), "Instruction TLB")
         if build_env['FULL_SYSTEM']:
             interrupts = Param.ArmInterrupts(
                     ArmInterrupts(), "Interrupt Controller")