# -*- mode:python -*-
+# Copyright (c) 2020 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Steve Reinhardt
Import('*')
+DebugFlag('Activity')
+DebugFlag('Commit')
+DebugFlag('Context')
+DebugFlag('Decode')
+DebugFlag('DynInst')
+DebugFlag('ExecEnable',
+ 'Filter: Enable exec tracing (no tracing without this)')
+DebugFlag('ExecCPSeq', 'Format: Instruction sequence number')
+DebugFlag('ExecEffAddr', 'Format: Include effective address')
+DebugFlag('ExecFaulting', 'Trace faulting instructions')
+DebugFlag('ExecFetchSeq', 'Format: Fetch sequence number')
+DebugFlag('ExecOpClass', 'Format: Include operand class')
+DebugFlag('ExecRegDelta')
+DebugFlag('ExecResult', 'Format: Include results from execution')
+DebugFlag('ExecSymbol', 'Format: Try to include symbol names')
+DebugFlag('ExecThread', 'Format: Include thread ID in trace')
+DebugFlag('ExecMicro', 'Filter: Include microops')
+DebugFlag('ExecMacro', 'Filter: Include macroops')
+DebugFlag('ExecUser', 'Filter: Trace user mode instructions')
+DebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions')
+DebugFlag('ExecAsid', 'Format: Include ASID in trace')
+DebugFlag('ExecFlags', 'Format: Include instruction flags in trace')
+DebugFlag('Fetch')
+DebugFlag('HtmCpu', 'Hardware Transactional Memory (CPU side)')
+DebugFlag('IntrControl')
+DebugFlag('O3PipeView')
+DebugFlag('PCEvent')
+DebugFlag('Quiesce')
+DebugFlag('Mwait')
+
+CompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr',
+ 'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta',
+ 'ExecResult', 'ExecSymbol', 'ExecThread',
+ 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel',
+ 'ExecAsid', 'ExecFlags' ])
+CompoundFlag('Exec', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
+ 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecMacro',
+ 'ExecFaulting', 'ExecUser', 'ExecKernel' ])
+CompoundFlag('ExecNoTicks', [ 'Exec', 'FmtTicksOff' ])
+
+Source('pc_event.cc')
+
if env['TARGET_ISA'] == 'null':
SimObject('IntrControl.py')
Source('intr_control_noisa.cc')
Return()
+# Only build the protocol buffer instructions tracer if we have protobuf support
+if env['HAVE_PROTOBUF'] and env['TARGET_ISA'] != 'x86':
+ SimObject('InstPBTrace.py')
+ Source('inst_pb_trace.cc')
+
SimObject('CheckerCPU.py')
SimObject('BaseCPU.py')
+SimObject('CPUTracers.py')
SimObject('FuncUnit.py')
-SimObject('ExeTracer.py')
-SimObject('IntelTrace.py')
SimObject('IntrControl.py')
-SimObject('NativeTrace.py')
SimObject('TimingExpr.py')
Source('activity.cc')
Source('base.cc')
-Source('cpuevent.cc')
Source('exetrace.cc')
Source('exec_context.cc')
Source('func_unit.cc')
Source('inteltrace.cc')
Source('intr_control.cc')
Source('nativetrace.cc')
-Source('pc_event.cc')
Source('profile.cc')
-Source('quiesce_event.cc')
Source('reg_class.cc')
Source('static_inst.cc')
Source('simple_thread.cc')
Source('thread_state.cc')
Source('timing_expr.cc')
-if env['TARGET_ISA'] == 'sparc':
- SimObject('LegionTrace.py')
- Source('legiontrace.cc')
-
SimObject('DummyChecker.py')
SimObject('StaticInstFlags.py')
Source('checker/cpu.cc')
Source('dummy_checker.cc')
DebugFlag('Checker')
-
-DebugFlag('Activity')
-DebugFlag('Commit')
-DebugFlag('Context')
-DebugFlag('Decode')
-DebugFlag('DynInst')
-DebugFlag('ExecEnable', 'Filter: Enable exec tracing (no tracing without this)')
-DebugFlag('ExecCPSeq', 'Format: Instruction sequence number')
-DebugFlag('ExecEffAddr', 'Format: Include effective address')
-DebugFlag('ExecFaulting', 'Trace faulting instructions')
-DebugFlag('ExecFetchSeq', 'Format: Fetch sequence number')
-DebugFlag('ExecOpClass', 'Format: Include operand class')
-DebugFlag('ExecRegDelta')
-DebugFlag('ExecResult', 'Format: Include results from execution')
-DebugFlag('ExecSpeculative', 'Format: Include a miss-/speculation flag (-/+)')
-DebugFlag('ExecSymbol', 'Format: Try to include symbol names')
-DebugFlag('ExecThread', 'Format: Include thread ID in trace')
-DebugFlag('ExecTicks', 'Format: Include tick count')
-DebugFlag('ExecMicro', 'Filter: Include microops')
-DebugFlag('ExecMacro', 'Filter: Include macroops')
-DebugFlag('ExecUser', 'Filter: Trace user mode instructions')
-DebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions')
-DebugFlag('ExecAsid', 'Format: Include ASID in trace')
-DebugFlag('ExecFlags', 'Format: Include instruction flags in trace')
-DebugFlag('Fetch')
-DebugFlag('IntrControl')
-DebugFlag('O3PipeView')
-DebugFlag('PCEvent')
-DebugFlag('Quiesce')
-
-CompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr',
- 'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta',
- 'ExecResult', 'ExecSpeculative', 'ExecSymbol', 'ExecThread',
- 'ExecTicks', 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel',
- 'ExecAsid', 'ExecFlags' ])
-CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
- 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecFaulting',
- 'ExecUser', 'ExecKernel' ])
-CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
- 'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecFaulting',
- 'ExecUser', 'ExecKernel' ])