#
# Authors: Steve Reinhardt
-import os
-import os.path
-
-# Import build environment variable from SConstruct.
-Import('env')
+Import('*')
#################################################################
#
exec_sig_template = '''
virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
-{ panic("initiateAcc not defined!"); };
+{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
virtual Fault completeAcc(Packet *pkt, %s *xc,
Trace::InstRecord *traceData) const
-{ panic("completeAcc not defined!"); };
+{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
'''
mem_ini_sig_template = '''
-virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); };
+virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
'''
mem_comp_sig_template = '''
-virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; };
+virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
'''
# Generate a temporary CPU list, including the CheckerCPU if
# it's enabled. This isn't used for anything else other than StaticInst
# headers.
-temp_cpu_list = env['CPU_MODELS']
+temp_cpu_list = env['CPU_MODELS'][:]
+
if env['USE_CHECKER']:
temp_cpu_list.append('CheckerCPU')
+ SimObject('CheckerCPU.py')
-# Generate header.
+# Generate header.
def gen_cpu_exec_signatures(target, source, env):
f = open(str(target[0]), 'w')
print >> f, '''
# and one of these are not being used.
CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
-#################################################################
-#
-# Include CPU-model-specific files based on set of models
-# specified in CPU_MODELS build option.
-#
-#################################################################
-
-sources = []
-
-need_simple_base = False
-if 'AtomicSimpleCPU' in env['CPU_MODELS']:
- need_simple_base = True
- sources += Split('simple/atomic.cc')
-
-if 'TimingSimpleCPU' in env['CPU_MODELS']:
- need_simple_base = True
- sources += Split('simple/timing.cc')
-
-if need_simple_base:
- sources += Split('simple/base.cc')
-
-if 'FastCPU' in env['CPU_MODELS']:
- sources += Split('fast/cpu.cc')
-
-need_bp_unit = False
-if 'O3CPU' in env['CPU_MODELS']:
- need_bp_unit = True
- sources += SConscript('o3/SConscript', exports = 'env')
- sources += Split('''
- o3/base_dyn_inst.cc
- o3/bpred_unit.cc
- o3/commit.cc
- o3/decode.cc
- o3/fetch.cc
- o3/free_list.cc
- o3/fu_pool.cc
- o3/cpu.cc
- o3/iew.cc
- o3/inst_queue.cc
- o3/lsq_unit.cc
- o3/lsq.cc
- o3/mem_dep_unit.cc
- o3/rename.cc
- o3/rename_map.cc
- o3/rob.cc
- o3/scoreboard.cc
- o3/store_set.cc
- ''')
- if env['USE_CHECKER']:
- sources += Split('o3/checker_builder.cc')
-
-if 'OzoneCPU' in env['CPU_MODELS']:
- need_bp_unit = True
- sources += Split('''
- ozone/base_dyn_inst.cc
- ozone/bpred_unit.cc
- ozone/cpu.cc
- ozone/cpu_builder.cc
- ozone/dyn_inst.cc
- ozone/front_end.cc
- ozone/lw_back_end.cc
- ozone/lw_lsq.cc
- ozone/rename_table.cc
- ''')
- if env['USE_CHECKER']:
- sources += Split('ozone/checker_builder.cc')
-
-if need_bp_unit:
- sources += Split('''
- o3/2bit_local_pred.cc
- o3/btb.cc
- o3/ras.cc
- o3/tournament_pred.cc
- ''')
+SimObject('BaseCPU.py')
+SimObject('FuncUnit.py')
+SimObject('ExeTracer.py')
+SimObject('IntelTrace.py')
+
+Source('activity.cc')
+Source('base.cc')
+Source('cpuevent.cc')
+Source('exetrace.cc')
+Source('func_unit.cc')
+Source('inteltrace.cc')
+Source('pc_event.cc')
+Source('quiesce_event.cc')
+Source('static_inst.cc')
+Source('simple_thread.cc')
+Source('thread_context.cc')
+Source('thread_state.cc')
+
+if env['FULL_SYSTEM']:
+ SimObject('IntrControl.py')
+
+ Source('intr_control.cc')
+ Source('profile.cc')
+
+ if env['TARGET_ISA'] == 'sparc':
+ SimObject('LegionTrace.py')
+ Source('legiontrace.cc')
+
+if env['TARGET_ISA'] == 'x86':
+ SimObject('NativeTrace.py')
+ Source('nativetrace.cc')
if env['USE_CHECKER']:
- sources += Split('checker/cpu.cc')
+ Source('checker/cpu.cc')
+ TraceFlag('Checker')
checker_supports = False
for i in CheckerSupportedCPUList:
if i in env['CPU_MODELS']:
checker_supports = True
if not checker_supports:
- print "Checker only supports CPU models %s, please " \
- "set USE_CHECKER=False or use one of those CPU models" \
- % CheckerSupportedCPUList
+ print "Checker only supports CPU models",
+ for i in CheckerSupportedCPUList:
+ print i,
+ print ", please set USE_CHECKER=False or use one of those CPU models"
Exit(1)
-
-
-# FullCPU sources are included from src/SConscript since they're not
-# below this point in the file hierarchy.
-
-# Convert file names to SCons File objects. This takes care of the
-# path relative to the top of the directory tree.
-sources = [File(s) for s in sources]
-
-Return('sources')
-
+# Workaround for bug in SCons version > 0.97d20071212
+# Scons bug id: 2006 M5 Bug id: 308
+else:
+ Dir('checker')
+
+TraceFlag('Activity')
+TraceFlag('Commit')
+TraceFlag('Context')
+TraceFlag('Decode')
+TraceFlag('DynInst')
+TraceFlag('ExecEnable')
+TraceFlag('ExecCPSeq')
+TraceFlag('ExecEffAddr')
+TraceFlag('ExecFetchSeq')
+TraceFlag('ExecOpClass')
+TraceFlag('ExecRegDelta')
+TraceFlag('ExecResult')
+TraceFlag('ExecSpeculative')
+TraceFlag('ExecSymbol')
+TraceFlag('ExecThread')
+TraceFlag('ExecTicks')
+TraceFlag('Fetch')
+TraceFlag('IntrControl')
+TraceFlag('PCEvent')
+TraceFlag('Quiesce')
+
+CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
+ 'ExecEffAddr', 'ExecResult', 'ExecSymbol' ])
projects / gem5.git / blobdiff