O3: Track if the RAS has been pushed or not to pop the RAS if neccessary.

[gem5.git] / src / cpu / SConscript

diff --git a/src/cpu/SConscript b/src/cpu/SConscript
index f6ed8068054ae20b6ce8b7402a2a66b0c593318a..e1ba59b8b7a74645a7f06773ad5f8ec9c22dcda6 100644 (file)
--- a/src/cpu/SConscript
+++ b/src/cpu/SConscript
@@ -69,10 +69,8 @@ virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) c
 # it's enabled.  This isn't used for anything else other than StaticInst
 # headers.
 temp_cpu_list = env['CPU_MODELS'][:]
-
-if env['USE_CHECKER']:
-    temp_cpu_list.append('CheckerCPU')
-    SimObject('CheckerCPU.py')
+temp_cpu_list.append('CheckerCPU')
+SimObject('CheckerCPU.py')
 
 # Generate header.
 def gen_cpu_exec_signatures(target, source, env):
@@ -98,17 +96,13 @@ env.Command('static_inst_exec_sigs.hh', (),
             Action(gen_cpu_exec_signatures, gen_sigs_string,
                    varlist = temp_cpu_list))
 
-env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER']))
 env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
 
-# List of suppported CPUs by the Checker.  Errors out if USE_CHECKER=True
-# and one of these are not being used.
-CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
-
 SimObject('BaseCPU.py')
 SimObject('FuncUnit.py')
 SimObject('ExeTracer.py')
 SimObject('IntelTrace.py')
+SimObject('IntrControl.py')
 SimObject('NativeTrace.py')
 
 Source('activity.cc')
@@ -117,64 +111,52 @@ Source('cpuevent.cc')
 Source('exetrace.cc')
 Source('func_unit.cc')
 Source('inteltrace.cc')
+Source('intr_control.cc')
 Source('nativetrace.cc')
 Source('pc_event.cc')
+Source('profile.cc')
 Source('quiesce_event.cc')
 Source('static_inst.cc')
 Source('simple_thread.cc')
 Source('thread_context.cc')
 Source('thread_state.cc')
 
-if env['FULL_SYSTEM']:
-    SimObject('IntrControl.py')
-
-    Source('intr_control.cc')
-    Source('profile.cc')
-
-    if env['TARGET_ISA'] == 'sparc':
-        SimObject('LegionTrace.py')
-        Source('legiontrace.cc')
-
-if env['USE_CHECKER']:
-    Source('checker/cpu.cc')
-    TraceFlag('Checker')
-    checker_supports = False
-    for i in CheckerSupportedCPUList:
-        if i in env['CPU_MODELS']:
-            checker_supports = True
-    if not checker_supports:
-        print "Checker only supports CPU models",
-        for i in CheckerSupportedCPUList:
-            print i,
-        print ", please set USE_CHECKER=False or use one of those CPU models"
-        Exit(1)
-
-TraceFlag('Activity')
-TraceFlag('Commit')
-TraceFlag('Context')
-TraceFlag('Decode')
-TraceFlag('DynInst')
-TraceFlag('ExecEnable')
-TraceFlag('ExecCPSeq')
-TraceFlag('ExecEffAddr')
-TraceFlag('ExecFaulting', 'Trace faulting instructions')
-TraceFlag('ExecFetchSeq')
-TraceFlag('ExecOpClass')
-TraceFlag('ExecRegDelta')
-TraceFlag('ExecResult')
-TraceFlag('ExecSpeculative')
-TraceFlag('ExecSymbol')
-TraceFlag('ExecThread')
-TraceFlag('ExecTicks')
-TraceFlag('ExecMicro')
-TraceFlag('ExecMacro')
-TraceFlag('ExecUser')
-TraceFlag('ExecKernel')
-TraceFlag('ExecAsid')
-TraceFlag('Fetch')
-TraceFlag('IntrControl')
-TraceFlag('PCEvent')
-TraceFlag('Quiesce')
+if env['TARGET_ISA'] == 'sparc':
+    SimObject('LegionTrace.py')
+    Source('legiontrace.cc')
+
+SimObject('DummyChecker.py')
+Source('checker/cpu.cc')
+Source('dummy_checker_builder.cc')
+DebugFlag('Checker')
+
+DebugFlag('Activity')
+DebugFlag('Commit')
+DebugFlag('Context')
+DebugFlag('Decode')
+DebugFlag('DynInst')
+DebugFlag('ExecEnable')
+DebugFlag('ExecCPSeq')
+DebugFlag('ExecEffAddr')
+DebugFlag('ExecFaulting', 'Trace faulting instructions')
+DebugFlag('ExecFetchSeq')
+DebugFlag('ExecOpClass')
+DebugFlag('ExecRegDelta')
+DebugFlag('ExecResult')
+DebugFlag('ExecSpeculative')
+DebugFlag('ExecSymbol')
+DebugFlag('ExecThread')
+DebugFlag('ExecTicks')
+DebugFlag('ExecMicro')
+DebugFlag('ExecMacro')
+DebugFlag('ExecUser')
+DebugFlag('ExecKernel')
+DebugFlag('ExecAsid')
+DebugFlag('Fetch')
+DebugFlag('IntrControl')
+DebugFlag('O3PipeView')
+DebugFlag('PCEvent')
+DebugFlag('Quiesce')
 
 CompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr',
     'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta',