cpu: Flush TLBs on switchOut()

[gem5.git] / src / cpu / base.cc

diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 202dc476a6abb7e4f56040fb61d7683b6039fd7a..14b5586c88300b6ed160990e2a66c109d92dd880 100644 (file)
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -361,6 +361,10 @@ BaseCPU::switchOut()
     _switchedOut = true;
     if (profileEvent && profileEvent->scheduled())
         deschedule(profileEvent);
+
+    // Flush all TLBs in the CPU to avoid having stale translations if
+    // it gets switched in later.
+    flushTLBs();
 }
 
 void
@@ -482,6 +486,22 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU)
     getDataPort().bind(data_peer_port);
 }
 
+void
+BaseCPU::flushTLBs()
+{
+    for (ThreadID i = 0; i < threadContexts.size(); ++i) {
+        ThreadContext &tc(*threadContexts[i]);
+        CheckerCPU *checker(tc.getCheckerCpuPtr());
+
+        tc.getITBPtr()->flushAll();
+        tc.getDTBPtr()->flushAll();
+        if (checker) {
+            checker->getITBPtr()->flushAll();
+            checker->getDTBPtr()->flushAll();
+        }
+    }
+}
+
 
 BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval)
     : cpu(_cpu), interval(_interval)