Merge with head.

[gem5.git] / src / cpu / base.hh

diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 51f3bb905d59134aaeb8a077bc5f4191404d4e58..76f6e46849961c65991c691b4349d1d1f723ed0e 100644 (file)
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -34,49 +34,87 @@
 
 #include <vector>
 
+#include "arch/isa_traits.hh"
 #include "base/statistics.hh"
 #include "config/full_system.hh"
-#include "cpu/sampler/sampler.hh"
 #include "sim/eventq.hh"
-#include "sim/sim_object.hh"
-#include "arch/isa_traits.hh"
+#include "sim/insttracer.hh"
+#include "mem/mem_object.hh"
+
+#if FULL_SYSTEM
+#include "arch/interrupts.hh"
+#endif
 
 class BranchPred;
 class CheckerCPU;
 class ThreadContext;
 class System;
+class Port;
+
+namespace TheISA
+{
+    class Predecoder;
+}
+
+class CPUProgressEvent : public Event
+{
+  protected:
+    Tick interval;
+    Counter lastNumInst;
+    BaseCPU *cpu;
+
+  public:
+    CPUProgressEvent(EventQueue *q, Tick ival, BaseCPU *_cpu);
 
-class BaseCPU : public SimObject
+    void process();
+
+    virtual const char *description();
+};
+
+class BaseCPU : public MemObject
 {
   protected:
     // CPU's clock period in terms of the number of ticks of curTime.
     Tick clock;
+    // @todo remove me after debugging with legion done
+    Tick instCnt;
 
   public:
+//    Tick currentTick;
     inline Tick frequency() const { return Clock::Frequency / clock; }
     inline Tick cycles(int numCycles) const { return clock * numCycles; }
     inline Tick curCycle() const { return curTick / clock; }
+    // @todo remove me after debugging with legion done
+    Tick instCount() { return instCnt; }
+
+    /** The next cycle the CPU should be scheduled, given a cache
+     * access or quiesce event returning on this cycle.  This function
+     * may return curTick if the CPU should run on the current cycle.
+     */
+    Tick nextCycle();
+
+    /** The next cycle the CPU should be scheduled, given a cache
+     * access or quiesce event returning on the given Tick.  This
+     * function may return curTick if the CPU should run on the
+     * current cycle.
+     * @param begin_tick The tick that the event is completing on.
+     */
+    Tick nextCycle(Tick begin_tick);
 
 #if FULL_SYSTEM
   protected:
-    uint64_t interrupts[TheISA::NumInterruptLevels];
-    uint64_t intstatus;
+//    uint64_t interrupts[TheISA::NumInterruptLevels];
+//    uint64_t intstatus;
+    TheISA::Interrupts interrupts;
 
   public:
     virtual void post_interrupt(int int_num, int index);
     virtual void clear_interrupt(int int_num, int index);
     virtual void clear_interrupts();
-    bool checkInterrupts;
-
-    bool check_interrupt(int int_num) const {
-        if (int_num > TheISA::NumInterruptLevels)
-            panic("int_num out of bounds\n");
+    virtual uint64_t get_interrupts(int int_num);
 
-        return interrupts[int_num] != 0;
-    }
-
-    bool check_interrupts() const { return intstatus != 0; }
-    uint64_t intr_status() const { return intstatus; }
+    bool check_interrupts(ThreadContext * tc) const
+    { return interrupts.check_interrupts(tc); }
 
     class ProfileEvent : public Event
     {
@@ -93,9 +131,15 @@ class BaseCPU : public SimObject
 
   protected:
     std::vector<ThreadContext *> threadContexts;
+    std::vector<TheISA::Predecoder *> predecoders;
+
+    Trace::InstTracer * tracer;
 
   public:
 
+    /// Provide access to the tracer pointer
+    Trace::InstTracer * getTracer() { return tracer; }
+
     /// Notify the CPU that the indicated context is now active.  The
     /// delay parameter indicates the number of ticks to wait before
     /// executing (typically 0 or 1).
@@ -110,6 +154,12 @@ class BaseCPU : public SimObject
     /// Notify the CPU that the indicated context is now halted.
     virtual void haltContext(int thread_num) {}
 
+   /// Given a Thread Context pointer return the thread num
+   int findContext(ThreadContext *tc);
+
+   /// Given a thread num get tho thread context for it
+   ThreadContext *getContext(int tn) { return threadContexts[tn]; }
+
   public:
     struct Params
     {
@@ -124,10 +174,18 @@ class BaseCPU : public SimObject
         bool functionTrace;
         Tick functionTraceStart;
         System *system;
-#if FULL_SYSTEM
         int cpu_id;
+        Trace::InstTracer * tracer;
+
+        Tick phase;
+#if FULL_SYSTEM
         Tick profile;
+
+        bool do_statistics_insts;
+        bool do_checkpoint_insts;
+        bool do_quiesce;
 #endif
+        Tick progress_interval;
         BaseCPU *checker;
 
         Params();
@@ -152,7 +210,7 @@ class BaseCPU : public SimObject
 
     /// Take over execution from the given CPU.  Used for warm-up and
     /// sampling.
-    virtual void takeOverFrom(BaseCPU *);
+    virtual void takeOverFrom(BaseCPU *, Port *ic, Port *dc);
 
     /**
      *  Number of threads we're actually simulating (<= SMT_MAX_THREADS).
@@ -176,6 +234,8 @@ class BaseCPU : public SimObject
 
     System *system;
 
+    Tick phase;
+
 #if FULL_SYSTEM
     /**
      * Serialize this object to the given output stream.