Merge with head.

[gem5.git] / src / cpu / base.hh

diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index d4213887dd50a626987e898a62f3147b75f56ac4..76f6e46849961c65991c691b4349d1d1f723ed0e 100644 (file)
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -34,11 +34,12 @@
 
 #include <vector>
 
+#include "arch/isa_traits.hh"
 #include "base/statistics.hh"
 #include "config/full_system.hh"
 #include "sim/eventq.hh"
+#include "sim/insttracer.hh"
 #include "mem/mem_object.hh"
-#include "arch/isa_traits.hh"
 
 #if FULL_SYSTEM
 #include "arch/interrupts.hh"
@@ -50,6 +51,11 @@ class ThreadContext;
 class System;
 class Port;
 
+namespace TheISA
+{
+    class Predecoder;
+}
+
 class CPUProgressEvent : public Event
 {
   protected:
@@ -125,9 +131,15 @@ class BaseCPU : public MemObject
 
   protected:
     std::vector<ThreadContext *> threadContexts;
+    std::vector<TheISA::Predecoder *> predecoders;
+
+    Trace::InstTracer * tracer;
 
   public:
 
+    /// Provide access to the tracer pointer
+    Trace::InstTracer * getTracer() { return tracer; }
+
     /// Notify the CPU that the indicated context is now active.  The
     /// delay parameter indicates the number of ticks to wait before
     /// executing (typically 0 or 1).
@@ -163,6 +175,8 @@ class BaseCPU : public MemObject
         Tick functionTraceStart;
         System *system;
         int cpu_id;
+        Trace::InstTracer * tracer;
+
         Tick phase;
 #if FULL_SYSTEM
         Tick profile;
@@ -196,7 +210,7 @@ class BaseCPU : public MemObject
 
     /// Take over execution from the given CPU.  Used for warm-up and
     /// sampling.
-    virtual void takeOverFrom(BaseCPU *);
+    virtual void takeOverFrom(BaseCPU *, Port *ic, Port *dc);
 
     /**
      *  Number of threads we're actually simulating (<= SMT_MAX_THREADS).