#include <vector>
#include "arch/isa_traits.hh"
+#include "arch/microcode_rom.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
#include "sim/eventq.hh"
#include "arch/interrupts.hh"
#endif
+class BaseCPUParams;
class BranchPred;
class CheckerCPU;
class ThreadContext;
BaseCPU *cpu;
public:
- CPUProgressEvent(EventQueue *q, Tick ival, BaseCPU *_cpu);
+ CPUProgressEvent(BaseCPU *_cpu, Tick ival);
void process();
- virtual const char *description();
+ virtual const char *description() const;
};
class BaseCPU : public MemObject
Tick clock;
// @todo remove me after debugging with legion done
Tick instCnt;
+ // every cpu has an id, put it in the base cpu
+ // Set at initialization, only time a cpuId might change is during a
+ // takeover (which should be done from within the BaseCPU anyway,
+ // therefore no setCpuId() method is provided
+ int _cpuId;
public:
+ /** Reads this CPU's ID. */
+ int cpuId() { return _cpuId; }
+
// Tick currentTick;
inline Tick frequency() const { return Clock::Frequency / clock; }
- inline Tick cycles(int numCycles) const { return clock * numCycles; }
+ inline Tick ticks(int numCycles) const { return clock * numCycles; }
inline Tick curCycle() const { return curTick / clock; }
inline Tick tickToCycles(Tick val) const { return val / clock; }
// @todo remove me after debugging with legion done
*/
Tick nextCycle(Tick begin_tick);
+ TheISA::MicrocodeRom microcodeRom;
+
#if FULL_SYSTEM
protected:
-// uint64_t interrupts[TheISA::NumInterruptLevels];
-// uint64_t intstatus;
- TheISA::Interrupts interrupts;
+ TheISA::Interrupts *interrupts;
public:
- virtual void post_interrupt(int int_num, int index);
- virtual void clear_interrupt(int int_num, int index);
- virtual void clear_interrupts();
- virtual uint64_t get_interrupts(int int_num);
+ TheISA::Interrupts *
+ getInterruptController()
+ {
+ return interrupts;
+ }
- bool check_interrupts(ThreadContext * tc) const
- { return interrupts.check_interrupts(tc); }
+ virtual void postInterrupt(int int_num, int index);
+ virtual void clearInterrupt(int int_num, int index);
+ virtual void clearInterrupts();
+
+ bool
+ checkInterrupts(ThreadContext *tc) const
+ {
+ return interrupts->checkInterrupts(tc);
+ }
class ProfileEvent : public Event
{
private:
BaseCPU *cpu;
- int interval;
+ Tick interval;
public:
- ProfileEvent(BaseCPU *cpu, int interval);
+ ProfileEvent(BaseCPU *cpu, Tick interval);
void process();
};
ProfileEvent *profileEvent;
ThreadContext *getContext(int tn) { return threadContexts[tn]; }
public:
- struct Params
- {
- std::string name;
- int numberOfThreads;
- bool deferRegistration;
- Counter max_insts_any_thread;
- Counter max_insts_all_threads;
- Counter max_loads_any_thread;
- Counter max_loads_all_threads;
- Tick clock;
- bool functionTrace;
- Tick functionTraceStart;
- System *system;
- int cpu_id;
- Trace::InstTracer * tracer;
-
- Tick phase;
-#if FULL_SYSTEM
- Tick profile;
-
- bool do_statistics_insts;
- bool do_checkpoint_insts;
- bool do_quiesce;
-#endif
- Tick progress_interval;
- BaseCPU *checker;
-
- Params();
- };
-
- const Params *params;
-
+ typedef BaseCPUParams Params;
+ const Params *params() const
+ { return reinterpret_cast<const Params *>(_params); }
BaseCPU(Params *params);
virtual ~BaseCPU();
*/
int number_of_threads;
+ TheISA::CoreSpecific coreParams; //ISA-Specific Params That Set Up State in Core
+
/**
* Vector of per-thread instruction-based event queues. Used for
* scheduling events based on number of instructions committed by