union Result {
uint64_t integer;
- float fp;
+// float fp;
double dbl;
};
*/
Addr nextPC;
+ /** Next non-speculative NPC. Target PC for Mips or Sparc. */
+ Addr nextNPC;
+
/** Predicted next PC. */
Addr predPC;
*/
Addr readNextPC() { return nextPC; }
+ /** Returns the next NPC. This could be the speculative next NPC if it is
+ * called prior to the actual branch target being calculated.
+ */
+ Addr readNextNPC() { return nextNPC; }
+
/** Set the predicted target of this current instruction. */
void setPredTarg(Addr predicted_PC) { predPC = predicted_PC; }
Addr readPredTarg() { return predPC; }
/** Returns whether the instruction was predicted taken or not. */
- bool predTaken() { return predPC != (PC + sizeof(MachInst)); }
+ bool predTaken()
+#if ISA_HAS_DELAY_SLOT
+ { return predPC != (nextPC + sizeof(MachInst)); }
+#else
+ { return predPC != (PC + sizeof(MachInst)); }
+#endif
/** Returns whether the instruction mispredicted. */
- bool mispredicted() { return predPC != nextPC; }
-
+ bool mispredicted()
+#if ISA_HAS_DELAY_SLOT
+ { return predPC != nextNPC; }
+#else
+ { return predPC != nextPC; }
+#endif
//
// Instruction types. Forward checks to StaticInst object.
//
bool isIndirectCtrl() const { return staticInst->isIndirectCtrl(); }
bool isCondCtrl() const { return staticInst->isCondCtrl(); }
bool isUncondCtrl() const { return staticInst->isUncondCtrl(); }
+ bool isCondDelaySlot() const { return staticInst->isCondDelaySlot(); }
bool isThreadSync() const { return staticInst->isThreadSync(); }
bool isSerializing() const { return staticInst->isSerializing(); }
bool isSerializeBefore() const
uint64_t readIntResult() { return instResult.integer; }
/** Returns the result of a floating point instruction. */
- float readFloatResult() { return instResult.fp; }
+ float readFloatResult() { return (float)instResult.dbl; }
/** Returns the result of a floating point (double) instruction. */
double readDoubleResult() { return instResult.dbl; }
void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
{
if (width == 32)
- instResult.fp = val;
+ instResult.dbl = (double)val;
else if (width == 64)
instResult.dbl = val;
else
/** Records an fp register being set to a value. */
void setFloatReg(const StaticInst *si, int idx, FloatReg val)
{
- instResult.fp = val;
+// instResult.fp = val;
+ instResult.dbl = (double)val;
}
/** Records an fp register being set to an integer value. */
nextPC = val;
}
+ /** Set the next NPC of this instruction (the target in Mips or Sparc).*/
+ void setNextNPC(uint64_t val)
+ {
+ nextNPC = val;
+ }
+
/** Sets the ASID. */
void setASID(short addr_space_id) { asid = addr_space_id; }