#include <string>
#include "base/refcnt.hh"
+#include "config/the_isa.hh"
#include "cpu/base_dyn_inst.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/simple_thread.hh"
// Try to fetch the instruction
#if FULL_SYSTEM
-#define IFETCH_FLAGS(pc) ((pc) & 1) ? PHYSICAL : 0
+#define IFETCH_FLAGS(pc) ((pc) & 1) ? PHYSICAL : 0
#else
-#define IFETCH_FLAGS(pc) 0
+#define IFETCH_FLAGS(pc) 0
#endif
uint64_t fetch_PC = thread->readPC() & ~3;
memReq = new Request(inst->threadNumber, fetch_PC,
sizeof(uint32_t),
IFETCH_FLAGS(thread->readPC()),
- fetch_PC, thread->readCpuId(), inst->threadNumber);
+ fetch_PC, thread->contextId(),
+ inst->threadNumber);
- bool succeeded = translateInstReq(memReq);
+ bool succeeded = itb->translateAtomic(memReq, thread);
if (!succeeded) {
if (inst->getFault() == NoFault) {
// Checks both the machine instruction and the PC.
validateInst(inst);
+#if THE_ISA == ALPHA_ISA
curStaticInst = StaticInst::decode(makeExtMI(machInst,
thread->readPC()));
+#elif THE_ISA == SPARC_ISA
+ curStaticInst = StaticInst::decode(makeExtMI(machInst,
+ thread->getTC()));
+#endif
#if FULL_SYSTEM
thread->setInst(machInst);
int misc_reg_idx = miscRegIdxs.front();
miscRegIdxs.pop();
- if (inst->tcBase()->readMiscReg(misc_reg_idx) !=
- thread->readMiscReg(misc_reg_idx)) {
+ if (inst->tcBase()->readMiscRegNoEffect(misc_reg_idx) !=
+ thread->readMiscRegNoEffect(misc_reg_idx)) {
warn("%lli: Misc reg idx %i (side effect) does not match! "
"Inst: %#x, checker: %#x",
curTick, misc_reg_idx,
- inst->tcBase()->readMiscReg(misc_reg_idx),
- thread->readMiscReg(misc_reg_idx));
+ inst->tcBase()->readMiscRegNoEffect(misc_reg_idx),
+ thread->readMiscRegNoEffect(misc_reg_idx));
handleError(inst);
}
}
} else if (idx < TheISA::Fpcr_DepTag) {
thread->setFloatRegBits(idx, inst->readIntResult());
} else {
- thread->setMiscReg(idx, inst->readIntResult());
+ thread->setMiscRegNoEffect(idx, inst->readIntResult());
}
}