ruby: move stall and wakeup functions to AbstractController

[gem5.git] / src / cpu / exec_context.hh

diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 2b9fe4bcf11dbda86990f85be8c7b604041a8d59..2f4d26976914c2b12e6ff8e84f565db9f6edcc33 100644 (file)
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -50,17 +50,9 @@ class ExecContext {
     /** Reads an integer register. */
     uint64_t readIntRegOperand(const StaticInst *si, int idx);
 
-    /** Reads a floating point register of a specific width. */
-    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width);
-
     /** Reads a floating point register of single register width. */
     FloatReg readFloatRegOperand(const StaticInst *si, int idx);
 
-    /** Reads a floating point register of a specific width in its
-     * binary format, instead of by value. */
-    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
-                                         int width);
-
     /** Reads a floating point register in its binary format, instead
      * of by value. */
     FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx);
@@ -68,18 +60,9 @@ class ExecContext {
     /** Sets an integer register to a value. */
     void setIntRegOperand(const StaticInst *si, int idx, uint64_t val);
 
-    /** Sets a floating point register of a specific width to a value. */
-    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
-                            int width);
-
     /** Sets a floating point register of single width to a value. */
     void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val);
 
-    /** Sets the bits of a floating point register of a specific width
-     * to a binary value. */
-    void setFloatRegOperandBits(const StaticInst *si, int idx,
-                                FloatRegBits val, int width);
-
     /** Sets the bits of a floating point register of single width
      * to a binary value. */
     void setFloatRegOperandBits(const StaticInst *si, int idx,
@@ -123,27 +106,11 @@ class ExecContext {
     /** Returns a pointer to the ThreadContext. */
     ThreadContext *tcBase();
 
-    /** Reads an address, creating a memory request with the given
-     * flags.  Stores result of read in data. */
-    template <class T>
-    Fault read(Addr addr, T &data, unsigned flags);
-
-    /** Writes to an address, creating a memory request with the given
-     * flags.  Writes data to memory.  For store conditionals, returns
-     * the result of the store in res. */
-    template <class T>
-    Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
-
-    /** Prefetches an address, creating a memory request with the
-     * given flags. */
-    void prefetch(Addr addr, unsigned flags);
+    Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
 
-    /** Hints to the memory system that an address will be written to
-     * soon, with the given size.  Creates a memory request with the
-     * given flags. */
-    void writeHint(Addr addr, int size, unsigned flags);
+    Fault writeMem(uint8_t *data, unsigned size,
+                   Addr addr, unsigned flags, uint64_t *res);
 
-#if FULL_SYSTEM
     /** Somewhat Alpha-specific function that handles returning from
      * an error or interrupt. */
     Fault hwrei();
@@ -153,8 +120,10 @@ class ExecContext {
      * return value is false, actual PAL call will be suppressed.
      */
     bool simPalCheck(int palFunc);
-#else
+
     /** Executes a syscall specified by the callnum. */
     void syscall(int64_t callnum);
-#endif
+
+    /** Finish a DTB address translation. */
+    void finishTranslation(WholeTranslationState *state);
 };