ruby: move stall and wakeup functions to AbstractController

[gem5.git] / src / cpu / exec_context.hh

diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index f6e8d7c2552d7071f0851c2e3811d4fb0a6b929c..2f4d26976914c2b12e6ff8e84f565db9f6edcc33 100644 (file)
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -48,39 +48,25 @@ class ExecContext {
     // to do).
 
     /** Reads an integer register. */
-    uint64_t readIntReg(const StaticInst *si, int idx);
-
-    /** Reads a floating point register of a specific width. */
-    FloatReg readFloatReg(const StaticInst *si, int idx, int width);
+    uint64_t readIntRegOperand(const StaticInst *si, int idx);
 
     /** Reads a floating point register of single register width. */
-    FloatReg readFloatReg(const StaticInst *si, int idx);
-
-    /** Reads a floating point register of a specific width in its
-     * binary format, instead of by value. */
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width);
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx);
 
     /** Reads a floating point register in its binary format, instead
      * of by value. */
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx);
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx);
 
     /** Sets an integer register to a value. */
-    void setIntReg(const StaticInst *si, int idx, uint64_t val);
-
-    /** Sets a floating point register of a specific width to a value. */
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width);
+    void setIntRegOperand(const StaticInst *si, int idx, uint64_t val);
 
     /** Sets a floating point register of single width to a value. */
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val);
-
-    /** Sets the bits of a floating point register of a specific width
-     * to a binary value. */
-    void setFloatRegBits(const StaticInst *si, int idx,
-                         FloatRegBits val, int width);
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val);
 
     /** Sets the bits of a floating point register of single width
      * to a binary value. */
-    void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val);
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val);
 
     /** Reads the PC. */
     uint64_t readPC();
@@ -97,18 +83,18 @@ class ExecContext {
     void setNextNPC(uint64_t val);
 
     /** Reads a miscellaneous register. */
-    MiscReg readMiscReg(int misc_reg);
+    MiscReg readMiscRegNoEffect(int misc_reg);
 
     /** Reads a miscellaneous register, handling any architectural
      * side effects due to reading that register. */
-    MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault);
+    MiscReg readMiscReg(int misc_reg);
 
     /** Sets a miscellaneous register. */
-    Fault setMiscReg(int misc_reg, const MiscReg &val);
+    void setMiscRegNoEffect(int misc_reg, const MiscReg &val);
 
     /** Sets a miscellaneous register, handling any architectural
      * side effects due to writing that register. */
-    Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val);
+    void setMiscReg(int misc_reg, const MiscReg &val);
 
     /** Records the effective address of the instruction.  Only valid
      * for memory ops. */
@@ -120,42 +106,24 @@ class ExecContext {
     /** Returns a pointer to the ThreadContext. */
     ThreadContext *tcBase();
 
-    /** Reads an address, creating a memory request with the given
-     * flags.  Stores result of read in data. */
-    template <class T>
-    Fault read(Addr addr, T &data, unsigned flags);
-
-    /** Writes to an address, creating a memory request with the given
-     * flags.  Writes data to memory.  For store conditionals, returns
-     * the result of the store in res. */
-    template <class T>
-    Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
-
-    /** Prefetches an address, creating a memory request with the
-     * given flags. */
-    void prefetch(Addr addr, unsigned flags);
+    Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
 
-    /** Hints to the memory system that an address will be written to
-     * soon, with the given size.  Creates a memory request with the
-     * given flags. */
-    void writeHint(Addr addr, int size, unsigned flags);
+    Fault writeMem(uint8_t *data, unsigned size,
+                   Addr addr, unsigned flags, uint64_t *res);
 
-#if FULL_SYSTEM
     /** Somewhat Alpha-specific function that handles returning from
      * an error or interrupt. */
     Fault hwrei();
-    /** Reads the interrupt flags. */
-    int readIntrFlag();
-    /** Sets the interrupt flags to a value. */
-    void setIntrFlag(int val);
 
     /**
      * Check for special simulator handling of specific PAL calls.  If
      * return value is false, actual PAL call will be suppressed.
      */
     bool simPalCheck(int palFunc);
-#else
+
     /** Executes a syscall specified by the callnum. */
     void syscall(int64_t callnum);
-#endif
+
+    /** Finish a DTB address translation. */
+    void finishTranslation(WholeTranslationState *state);
 };