typedef TheISA::IntReg IntReg;
typedef TheISA::FloatReg FloatReg;
typedef TheISA::FloatRegBits FloatRegBits;
+ typedef TheISA::CCReg CCReg;
typedef TheISA::MiscReg MiscReg;
typedef TheISA::RegIndex RegIndex;
FloatRegBits i[ThePipeline::MaxThreads][TheISA::NumFloatRegs];
} floatRegs;
TheISA::IntReg intRegs[ThePipeline::MaxThreads][TheISA::NumIntRegs];
+#ifdef ISA_HAS_CC_REGS
+ TheISA::CCReg ccRegs[ThePipeline::MaxThreads][TheISA::NumCCRegs];
+#endif
/** ISA state */
std::vector<TheISA::ISA *> isa;
/** Dependency Tracker for Integer & Floating Point Regs */
RegDepMap archRegDepMap[ThePipeline::MaxThreads];
- /** Register Types Used in Dependency Tracking */
- enum RegType { IntType, FloatType, MiscType, NumRegTypes};
-
/** Global communication structure */
TimeBuffer<TimeStruct> timeBuffer;
FloatRegBits readFloatRegBits(RegIndex reg_idx, ThreadID tid);
+ CCReg readCCReg(RegIndex reg_idx, ThreadID tid);
+
void setIntReg(RegIndex reg_idx, uint64_t val, ThreadID tid);
void setFloatReg(RegIndex reg_idx, FloatReg val, ThreadID tid);
void setFloatRegBits(RegIndex reg_idx, FloatRegBits val, ThreadID tid);
- RegType inline getRegType(RegIndex reg_idx)
- {
- switch (regIdxToClass(reg_idx)) {
- case IntRegClass:
- return IntType;
-
- case FloatRegClass:
- return FloatType;
-
- case MiscRegClass:
- return MiscType;
-
- default:
- panic("register %d out of range\n", reg_idx);
- }
- }
+ void setCCReg(RegIndex reg_idx, CCReg val, ThreadID tid);
- RegIndex flattenRegIdx(RegIndex reg_idx, RegType ®_type, ThreadID tid);
+ RegIndex flattenRegIdx(RegIndex reg_idx, RegClass ®_type, ThreadID tid);
/** Reads a miscellaneous register. */
MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid = 0);