cpu: Implement a flat register interface in thread contexts

[gem5.git] / src / cpu / inorder / first_stage.hh

diff --git a/src/cpu/inorder/first_stage.hh b/src/cpu/inorder/first_stage.hh
index 3a3d550a0fbc536c627c993e4ec598dd2a5a9e82..5e8aecfea3f663e072c9c029c44123c233cf0938 100644 (file)
--- a/src/cpu/inorder/first_stage.hh
+++ b/src/cpu/inorder/first_stage.hh
@@ -36,12 +36,12 @@
 #include <vector>
 
 #include "base/statistics.hh"
-#include "cpu/timebuf.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
 #include "cpu/inorder/comm.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
 #include "cpu/inorder/params.hh"
-#include "cpu/inorder/pipeline_traits.hh"
 #include "cpu/inorder/pipeline_stage.hh"
+#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/timebuf.hh"
 
 class InOrderCPU;
 
@@ -68,11 +68,6 @@ class FirstStage : public PipelineStage {
      */
     void sortInsts() {}
 
-    /** There are no skidBuffers for the first stage. So
-     *  just use an empty function.
-     */
-    void skidInsert(ThreadID tid) { }
-
     /** The number of fetching threads in the CPU */
     int numFetchingThreads;