Yet another merge with the main repository.
[gem5.git] / src / cpu / inorder / inorder_dyn_inst.cc
index 5343206c1fe105e1ab46e59fe18ba5e0f80f4f1b..b61beece2558fe1bdf8c76977810d5fb3a1acd7e 100644 (file)
@@ -45,6 +45,7 @@
 #include "cpu/exetrace.hh"
 #include "debug/InOrderDynInst.hh"
 #include "mem/request.hh"
+#include "sim/full_system.hh"
 
 using namespace std;
 using namespace TheISA;
@@ -94,9 +95,9 @@ InOrderDynInst::cpuId()
 }
 
 void
-InOrderDynInst::setMachInst(ExtMachInst machInst)
+InOrderDynInst::setStaticInst(StaticInstPtr si)
 {
-    staticInst = StaticInst::decode(machInst, pc.instAddr());
+    staticInst = si;
 
     for (int i = 0; i < this->staticInst->numDestRegs(); i++) {
         _destRegIdx[i] = this->staticInst->destRegIdx(i);
@@ -269,8 +270,6 @@ InOrderDynInst::memAccess()
 }
 
 
-#if FULL_SYSTEM
-
 Fault
 InOrderDynInst::hwrei()
 {
@@ -311,14 +310,16 @@ InOrderDynInst::simPalCheck(int palFunc)
 #endif
     return this->cpu->simPalCheck(palFunc, this->threadNumber);
 }
-#else
+
 void
 InOrderDynInst::syscall(int64_t callnum)
 {
+    if (FullSystem)
+        panic("Syscall emulation isn't available in FS mode.\n");
+
     syscallNum = callnum;
     cpu->syscallContext(NoFault, this->threadNumber, this);
 }
-#endif
 
 void
 InOrderDynInst::setSquashInfo(unsigned stage_num)