CPU: Make physPort and getPhysPort available in SE mode.

[gem5.git] / src / cpu / inorder / inorder_trace.cc

diff --git a/src/cpu/inorder/inorder_trace.cc b/src/cpu/inorder/inorder_trace.cc
index f12a1b7a952a41b41ea0a5b59ebbd63f95e7bb91..8edb5b1cc1a63bafe0940db6cefe74fd675e2933 100644 (file)
--- a/src/cpu/inorder/inorder_trace.cc
+++ b/src/cpu/inorder/inorder_trace.cc
@@ -31,11 +31,13 @@
 
 #include <iomanip>
 
-#include "cpu/exetrace.hh"
+#include "config/the_isa.hh"
 #include "cpu/inorder/inorder_trace.hh"
-#include "cpu/static_inst.hh"
 #include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/exetrace.hh"
+#include "cpu/static_inst.hh"
 #include "cpu/thread_context.hh"
+#include "debug/ExecEnable.hh"
 #include "params/InOrderTrace.hh"
 
 using namespace std;
@@ -63,24 +65,24 @@ InOrderTraceRecord *
 InOrderTrace::getInstRecord(unsigned num_stages, bool stage_tracing,
         ThreadContext *tc)
 {
-    if (!IsOn(ExecEnable))
+    if (!Debug::ExecEnable)
         return NULL;
 
     if (!Trace::enabled)
         return NULL;
 
-    return new InOrderTraceRecord(num_stages, stage_tracing, tc);
+    return new InOrderTraceRecord(num_stages, stage_tracing, tc, 0);
 }
 
 InOrderTraceRecord *
 InOrderTrace::getInstRecord(Tick when, ThreadContext *tc,
-        const StaticInstPtr staticInst, Addr pc,
-        const StaticInstPtr macroStaticInst, MicroPC upc)
+        const StaticInstPtr staticInst, TheISA::PCState _pc,
+        const StaticInstPtr macroStaticInst)
 {
-    return new InOrderTraceRecord(ThePipeline::NumStages, true, tc);
+    return new InOrderTraceRecord(ThePipeline::NumStages, true, tc, _pc);
 }
 
-/* namespace Trace */ }
+} // namespace Trace
 
 ////////////////////////////////////////////////////////////////////////
 //