cpu: Implement a flat register interface in thread contexts

[gem5.git] / src / cpu / inorder / resource_pool.hh

diff --git a/src/cpu/inorder/resource_pool.hh b/src/cpu/inorder/resource_pool.hh
index 4f05494c45eb826f09cd3e9f2d903aded195aa59..207967d064970e771f64ef000f889e4800ed77d1 100644 (file)
--- a/src/cpu/inorder/resource_pool.hh
+++ b/src/cpu/inorder/resource_pool.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2007 MIPS Technologies, Inc.
  * All rights reserved.
  *
@@ -32,7 +44,6 @@
 #ifndef __CPU_INORDER_RESOURCE_POOL_HH__
 #define __CPU_INORDER_RESOURCE_POOL_HH__
 
-#include <list>
 #include <string>
 #include <vector>
 
@@ -46,9 +57,9 @@
 #include "sim/eventq.hh"
 #include "sim/sim_object.hh"
 
+class CacheUnit;
 class Event;
-class InOrderCPU;
-class Resource;
+class FetchUnit;
 class ResourceEvent;
 
 class ResourcePool {
@@ -121,7 +132,7 @@ class ResourcePool {
         const char *description() const;
 
         /** Schedule Event */
-        void scheduleEvent(int delay);
+        void scheduleEvent(Cycles delay);
 
         /** Unschedule This Event */
         void unscheduleEvent();
@@ -142,14 +153,7 @@ class ResourcePool {
     /** Register Statistics in All Resources */
     void regStats();
 
-    /** Returns a specific port. */
-    Port* getPort(const std::string &if_name, int idx);
-
-    /** Returns a specific port. */
-    unsigned getPortIdx(const std::string &port_name);
-
     /** Returns a specific resource. */
-    unsigned getResIdx(const std::string &res_name);
     unsigned getResIdx(const ThePipeline::ResourceId &res_id);
 
     /** Returns a pointer to a resource */
@@ -202,7 +206,8 @@ class ResourcePool {
 
     /** Schedule resource event, regardless of its current state. */
     void scheduleEvent(InOrderCPU::CPUEventType e_type, DynInstPtr inst = NULL,
-                       int delay = 0, int res_idx = 0, ThreadID tid = 0);
+                       Cycles delay = Cycles(0), int res_idx = 0,
+                       ThreadID tid = 0);
 
    /** UnSchedule resource event, regardless of its current state. */
     void unscheduleEvent(int res_idx, DynInstPtr inst);
@@ -215,11 +220,29 @@ class ResourcePool {
 
     DynInstPtr dummyInst[ThePipeline::MaxThreads];
 
+    /**
+     * Get a pointer to the (always present) instruction fetch unit.
+     *
+     * @return the instruction unit
+     */
+    FetchUnit *getInstUnit() const { return instUnit; }
+
+    /**
+     * Get a pointer to the (always present) data load/store unit.
+     *
+     * @return the data cache unit
+     */
+    CacheUnit *getDataUnit() const { return dataUnit; }
+
   private:
-    std::vector<Resource *> resources;
 
-    /** Resources that interface with memory objects */
-    std::vector<int> memObjects;
+    /** The instruction fetch unit. */
+    FetchUnit *instUnit;
+
+    /** The data load/store unit. */
+    CacheUnit *dataUnit;
+
+    std::vector<Resource *> resources;
 
     /** Resources that need to be updated on an inst. graduation */
     std::vector<int> gradObjects;