cpu: Update DRAM traffic gen

[gem5.git] / src / cpu / inorder / resources / agen_unit.cc

diff --git a/src/cpu/inorder/resources/agen_unit.cc b/src/cpu/inorder/resources/agen_unit.cc
index f462b12ea95ca6dae7acad62b37d520c12696b6e..f978b2fa78816c67654a5f35c5a0ba41a6c5e8b7 100644 (file)
--- a/src/cpu/inorder/resources/agen_unit.cc
+++ b/src/cpu/inorder/resources/agen_unit.cc
@@ -30,23 +30,42 @@
  */
 
 #include "cpu/inorder/resources/agen_unit.hh"
+#include "debug/InOrderAGEN.hh"
 
 AGENUnit::AGENUnit(std::string res_name, int res_id, int res_width,
-                   int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params)
+                   Cycles res_latency, InOrderCPU *_cpu,
+                   ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu)
 { }
 
+void
+AGENUnit::regStats()
+{
+    agens
+        .name(name() + ".agens")
+        .desc("Number of Address Generations");
+
+    Resource::regStats();
+}
+
 void
 AGENUnit::execute(int slot_num)
 {
-    ResourceRequest* agen_req = reqMap[slot_num];
-    DynInstPtr inst = reqMap[slot_num]->inst;
-    Fault fault = reqMap[slot_num]->fault;
-    int tid;
-    int seq_num = inst->seqNum;
+    ResourceRequest* agen_req = reqs[slot_num];
+    DynInstPtr inst = reqs[slot_num]->inst;
+#if TRACING_ON
+    ThreadID tid = inst->readTid();
+#endif
+    InstSeqNum seq_num = inst->seqNum;
 
-    tid = inst->readTid();
-    agen_req->fault = NoFault;
+    if (inst->fault != NoFault) {
+        DPRINTF(InOrderAGEN,
+                "[tid:%i]: [sn:%i]: Detected %s fault @ %x. Forwarding to "
+                "next stage.\n", tid, inst->seqNum, inst->fault->name(),
+                inst->pcState());
+        agen_req->done();
+        return;
+    }
 
     switch (agen_req->cmd)
     {
@@ -54,39 +73,29 @@ AGENUnit::execute(int slot_num)
         {
             // Load/Store Instruction
             if (inst->isMemRef()) {
-                DPRINTF(InOrderAGEN, "[tid:%i] Generating Address for [sn:%i] (%s).\n",
-                    tid, inst->seqNum, inst->staticInst->getName());
+                DPRINTF(InOrderAGEN,
+                        "[tid:%i] Generating Address for [sn:%i] (%s).\n",
+                        tid, seq_num, inst->staticInst->getName());
 
+                inst->fault = inst->calcEA();
+                inst->setMemAddr(inst->getEA());
 
-                // We are not handdling Prefetches quite yet
-                if (inst->isDataPrefetch() || inst->isInstPrefetch()) {
-                    panic("Prefetches arent handled yet.\n");
-                } else {
-                    if (inst->isLoad()) {
-                        fault = inst->calcEA();
-                        inst->setMemAddr(inst->getEA());
-                        //inst->setExecuted();
-
-                        DPRINTF(InOrderAGEN, "[tid:%i] [sn:%i] Effective address calculated to be: "
-                                "%#x.\n", tid, inst->seqNum, inst->getEA());
-                    } else if (inst->isStore()) {
-                        fault = inst->calcEA();
-                        inst->setMemAddr(inst->getEA());
-
-                        DPRINTF(InOrderAGEN, "[tid:%i] [sn:%i] Effective address calculated to be: "
-                                "%#x.\n", tid, inst->seqNum, inst->getEA());
-                    } else {
-                        panic("Unexpected memory type!\n");
-                    }
+                DPRINTF(InOrderAGEN,
+                    "[tid:%i] [sn:%i] Effective address calculated as: %#x\n",
+                    tid, seq_num, inst->getEA());
 
-                    if (fault == NoFault) {
-                        agen_req->done();
-                    } else {
-                        fatal("%s encountered @ [sn:%i]",fault->name(), seq_num);
-                    }
+                if (inst->fault == NoFault) {
+                    agen_req->done();
+                } else {
+                    fatal("%s encountered while calculating address [sn:%i] %s",
+                          inst->fault->name(), seq_num, inst->instName());
                 }
+
+                agens++;
             } else {
-                DPRINTF(InOrderAGEN, "[tid:] Ignoring non-memory instruction [sn:%i].\n", tid, seq_num);
+                DPRINTF(InOrderAGEN,
+                        "[tid:] Ignoring non-memory instruction [sn:%i]\n",
+                        tid, seq_num);
                 agen_req->done();
             }
         }