cpu: Update DRAM traffic gen
[gem5.git] / src / cpu / inorder / resources / execution_unit.cc
index 25575695639fb4a90f6a1f39b35ae3ecf1483864..296d5126fa7a4bc981419d234ef3f18402b361cb 100644 (file)
 #include "cpu/inorder/resources/execution_unit.hh"
 #include "cpu/inorder/cpu.hh"
 #include "cpu/inorder/resource_pool.hh"
+#include "debug/Fault.hh"
 #include "debug/InOrderExecute.hh"
 #include "debug/InOrderStall.hh"
+#include "sim/full_system.hh"
 
 using namespace std;
 using namespace ThePipeline;
 
 ExecutionUnit::ExecutionUnit(string res_name, int res_id, int res_width,
-                             int res_latency, InOrderCPU *_cpu,
+                             Cycles res_latency, InOrderCPU *_cpu,
                              ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu),
       lastExecuteTick(0), lastControlTick(0)
@@ -218,14 +220,14 @@ ExecutionUnit::execute(int slot_num)
                                     seq_num, didx, inst->readIntResult(didx));
 #endif
 
-#if !FULL_SYSTEM
-                    // The Syscall might change the PC, so conservatively
-                    // squash everything behing it
-                    if (inst->isSyscall()) {
-                        inst->setSquashInfo(stage_num);
-                        setupSquash(inst, stage_num, tid);
+                    if (!FullSystem) {
+                        // The Syscall might change the PC, so conservatively
+                        // squash everything behing it
+                        if (inst->isSyscall()) {
+                            inst->setSquashInfo(stage_num);
+                            setupSquash(inst, stage_num, tid);
+                        }
                     }
-#endif
                 } else {
                     DPRINTF(InOrderExecute, "[tid:%i]: [sn:%i]: had a %s "
                             "fault.\n", inst->readTid(), seq_num, fault->name());