cpu: Update DRAM traffic gen

[gem5.git] / src / cpu / inorder / resources / fetch_seq_unit.cc

diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc
index 58e466e13e52c69537e345f003bcfd88c128f548..ead4953fb2505926276cbe3d006c304208c001dc 100644 (file)
--- a/src/cpu/inorder/resources/fetch_seq_unit.cc
+++ b/src/cpu/inorder/resources/fetch_seq_unit.cc
@@ -40,7 +40,7 @@ using namespace TheISA;
 using namespace ThePipeline;
 
 FetchSeqUnit::FetchSeqUnit(std::string res_name, int res_id, int res_width,
-                           int res_latency, InOrderCPU *_cpu,
+                           Cycles res_latency, InOrderCPU *_cpu,
                            ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu),
       instSize(sizeof(MachInst))
@@ -81,6 +81,15 @@ FetchSeqUnit::execute(int slot_num)
     ThreadID tid = inst->readTid();
     int stage_num = fs_req->getStageNum();
 
+    if (inst->fault != NoFault) {
+        DPRINTF(InOrderFetchSeq,
+                "[tid:%i]: [sn:%i]: Detected %s fault @ %x. Forwarding to "
+                "next stage.\n", tid, inst->seqNum, inst->fault->name(),
+                inst->pcState());
+        fs_req->done();
+        return;
+    }
+
     switch (fs_req->cmd)
     {
       case AssignNextPC:
@@ -171,7 +180,7 @@ FetchSeqUnit::squash(DynInstPtr inst, int squash_stage,
                 // A Trap Caused This Fault and will update the pc state
                 // when done trapping
                 DPRINTF(InOrderFetchSeq, "[tid:%i] Blocking due to fault @ "
-                        "[sn:%i].%s %s \n", inst->seqNum,
+                        "[sn:%i].%s %s \n", tid, inst->seqNum,
                         inst->instName(), inst->pcState());
                 pcValid[tid] = false;
             } else {
@@ -200,13 +209,10 @@ FetchSeqUnit::squash(DynInstPtr inst, int squash_stage,
                     }
 
                     if (bdelay_inst) {
-                        DPRINTF(Resource, "Evaluating %s v. %s\n",
-                                bdelay_inst->pc, nextPC);
-
                         if (bdelay_inst->pc.instAddr() == nextPC.instAddr()) {
                             bdelay_inst->pc = nextPC;
                             advancePC(nextPC, inst->staticInst);
-                            DPRINTF(Resource, "Advanced PC to %s\n", nextPC);
+                            DPRINTF(InOrderFetchSeq, "Advanced PC to %s\n", nextPC);
                         }
                     }
                 } else {
@@ -298,12 +304,10 @@ FetchSeqUnit::suspendThread(ThreadID tid)
 }
 
 void
-FetchSeqUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst)
+FetchSeqUnit::trap(const Fault &fault, ThreadID tid, DynInstPtr inst)
 {
     pcValid[tid] = true;
     pc[tid] = cpu->pcState(tid);
-    DPRINTF(Fault, "[tid:%i]: Trap updating to PC: "
-            "%s.\n", tid, pc[tid]);
     DPRINTF(InOrderFetchSeq, "[tid:%i]: Trap updating to PC: "
             "%s.\n", tid, pc[tid]);
 }