#ifndef __CPU_INORDER_FETCH_SEQ_UNIT_HH__
#define __CPU_INORDER_FETCH_SEQ_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
#include "config/the_isa.hh"
-#include "cpu/inorder/resource.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/resource.hh"
class FetchSeqUnit : public Resource {
public:
typedef ThePipeline::DynInstPtr DynInstPtr;
+ typedef std::list<DynInstPtr>::iterator ListIt;
enum Command {
AssignNextPC,
void updateAfterContextSwitch(DynInstPtr inst, ThreadID tid);
- /** Override default Resource squash sequence. This actually,
- * looks in the global communication buffer to get squash
- * info
- */
+ /** Update to correct PC from a squash */
void squash(DynInstPtr inst, int squash_stage,
- InstSeqNum squash_seq_num, ThreadID tid);
-
+ InstSeqNum squash_seq_num, ThreadID tid);
- inline void squashAfterInst(DynInstPtr inst, int stage_num, ThreadID tid);
+ /** Update to correct PC from a trap */
+ void trap(Fault fault, ThreadID tid, DynInstPtr inst);
protected:
unsigned instSize;