ruby: move stall and wakeup functions to AbstractController

[gem5.git] / src / cpu / inteltrace.hh

diff --git a/src/cpu/inteltrace.hh b/src/cpu/inteltrace.hh
index c4ace4f4b0108191fd4a126c696c83c5040309fb..e5f88bf1a3f9a48228d1383ea400bb3da89062ea 100644 (file)
--- a/src/cpu/inteltrace.hh
+++ b/src/cpu/inteltrace.hh
@@ -35,21 +35,22 @@
 #include "base/trace.hh"
 #include "base/types.hh"
 #include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
+#include "debug/ExecEnable.hh"
+#include "debug/ExecSpeculative.hh"
 #include "params/IntelTrace.hh"
 #include "sim/insttracer.hh"
 
-class ThreadContext;
-
 namespace Trace {
 
 class IntelTraceRecord : public InstRecord
 {
   public:
     IntelTraceRecord(Tick _when, ThreadContext *_thread,
-               const StaticInstPtr _staticInst, Addr _pc, bool spec,
-               const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
+               const StaticInstPtr _staticInst, TheISA::PCState _pc,
+               bool spec, const StaticInstPtr _macroStaticInst = NULL)
         : InstRecord(_when, _thread, _staticInst, _pc, spec,
-                _macroStaticInst, _upc)
+                _macroStaticInst)
     {
     }
 
@@ -65,23 +66,23 @@ class IntelTrace : public InstTracer
 
     IntelTraceRecord *
     getInstRecord(Tick when, ThreadContext *tc,
-            const StaticInstPtr staticInst, Addr pc,
-            const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
+            const StaticInstPtr staticInst, TheISA::PCState pc,
+            const StaticInstPtr macroStaticInst = NULL)
     {
-        if (!IsOn(ExecEnable))
+        if (!Debug::ExecEnable)
             return NULL;
 
         if (!Trace::enabled)
             return NULL;
 
-        if (!IsOn(ExecSpeculative) && tc->misspeculating())
+        if (!Debug::ExecSpeculative && tc->misspeculating())
             return NULL;
 
         return new IntelTraceRecord(when, tc,
-                staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
+                staticInst, pc, tc->misspeculating(), macroStaticInst);
     }
 };
 
-/* namespace Trace */ }
+} // namespace Trace
 
 #endif // __CPU_INTELTRACE_HH__