A possible implementation of a multiplexed bus.

[gem5.git] / src / cpu / intr_control.cc

diff --git a/src/cpu/intr_control.cc b/src/cpu/intr_control.cc
index 3171a352fb8ebcb2dcf11ee3ba68662319a77dd7..4cbc868914428b1e4ecaca40aa504dfd2c69b9dd 100644 (file)
--- a/src/cpu/intr_control.cc
+++ b/src/cpu/intr_control.cc
@@ -33,7 +33,7 @@
 #include <vector>
 
 #include "cpu/base.hh"
-#include "cpu/exec_context.hh"
+#include "cpu/thread_context.hh"
 #include "cpu/intr_control.hh"
 #include "sim/builder.hh"
 #include "sim/sim_object.hh"
@@ -51,32 +51,32 @@ IntrControl::IntrControl(const string &name, BaseCPU *c)
 void
 IntrControl::post(int int_num, int index)
 {
-    std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
-    BaseCPU *temp = xcvec[0]->getCpuPtr();
+    std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts;
+    BaseCPU *temp = tcvec[0]->getCpuPtr();
     temp->post_interrupt(int_num, index);
 }
 
 void
 IntrControl::post(int cpu_id, int int_num, int index)
 {
-    std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
-    BaseCPU *temp = xcvec[cpu_id]->getCpuPtr();
+    std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts;
+    BaseCPU *temp = tcvec[cpu_id]->getCpuPtr();
     temp->post_interrupt(int_num, index);
 }
 
 void
 IntrControl::clear(int int_num, int index)
 {
-    std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
-    BaseCPU *temp = xcvec[0]->getCpuPtr();
+    std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts;
+    BaseCPU *temp = tcvec[0]->getCpuPtr();
     temp->clear_interrupt(int_num, index);
 }
 
 void
 IntrControl::clear(int cpu_id, int int_num, int index)
 {
-    std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
-    BaseCPU *temp = xcvec[cpu_id]->getCpuPtr();
+    std::vector<ThreadContext *> &tcvec = cpu->system->threadContexts;
+    BaseCPU *temp = tcvec[cpu_id]->getCpuPtr();
     temp->clear_interrupt(int_num, index);
 }