cpu,stats: Update stats style for base.hh and base.cc

[gem5.git] / src / cpu / intr_control.cc

diff --git a/src/cpu/intr_control.cc b/src/cpu/intr_control.cc
index 3171a352fb8ebcb2dcf11ee3ba68662319a77dd7..b62483594d86db2945be2b12b6328957a8aa13f9 100644 (file)
--- a/src/cpu/intr_control.cc
+++ b/src/cpu/intr_control.cc
@@ -24,77 +24,53 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Nathan Binkert
- *          Ron Dreslinski
  */
 
+#include "cpu/intr_control.hh"
+
 #include <string>
 #include <vector>
 
+#include "base/trace.hh"
 #include "cpu/base.hh"
-#include "cpu/exec_context.hh"
-#include "cpu/intr_control.hh"
-#include "sim/builder.hh"
+#include "cpu/thread_context.hh"
+#include "debug/IntrControl.hh"
 #include "sim/sim_object.hh"
 
 using namespace std;
 
-IntrControl::IntrControl(const string &name, BaseCPU *c)
-    : SimObject(name), cpu(c)
+IntrControl::IntrControl(const Params &p)
+    : SimObject(p), sys(p.sys)
 {}
 
-/* @todo
- *Fix the cpu sim object parameter to be a system pointer
- *instead, to avoid some extra dereferencing
- */
-void
-IntrControl::post(int int_num, int index)
-{
-    std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
-    BaseCPU *temp = xcvec[0]->getCpuPtr();
-    temp->post_interrupt(int_num, index);
-}
-
 void
 IntrControl::post(int cpu_id, int int_num, int index)
 {
-    std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
-    BaseCPU *temp = xcvec[cpu_id]->getCpuPtr();
-    temp->post_interrupt(int_num, index);
+    DPRINTF(IntrControl, "post  %d:%d (cpu %d)\n", int_num, index, cpu_id);
+    auto *tc = sys->threads[cpu_id];
+    tc->getCpuPtr()->postInterrupt(tc->threadId(), int_num, index);
 }
 
 void
-IntrControl::clear(int int_num, int index)
+IntrControl::clear(int cpu_id, int int_num, int index)
 {
-    std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
-    BaseCPU *temp = xcvec[0]->getCpuPtr();
-    temp->clear_interrupt(int_num, index);
+    DPRINTF(IntrControl, "clear %d:%d (cpu %d)\n", int_num, index, cpu_id);
+    auto *tc = sys->threads[cpu_id];
+    tc->getCpuPtr()->clearInterrupt(tc->threadId(), int_num, index);
 }
 
 void
-IntrControl::clear(int cpu_id, int int_num, int index)
+IntrControl::clearAll(int cpu_id)
 {
-    std::vector<ExecContext *> &xcvec = cpu->system->execContexts;
-    BaseCPU *temp = xcvec[cpu_id]->getCpuPtr();
-    temp->clear_interrupt(int_num, index);
+    DPRINTF(IntrControl, "Clear all pending interrupts for CPU %d\n", cpu_id);
+    auto *tc = sys->threads[cpu_id];
+    tc->getCpuPtr()->clearInterrupts(tc->threadId());
 }
 
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(IntrControl)
-
-    SimObjectParam<BaseCPU *> cpu;
-
-END_DECLARE_SIM_OBJECT_PARAMS(IntrControl)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(IntrControl)
-
-    INIT_PARAM(cpu, "the cpu")
-
-END_INIT_SIM_OBJECT_PARAMS(IntrControl)
-
-CREATE_SIM_OBJECT(IntrControl)
+bool
+IntrControl::havePosted(int cpu_id) const
 {
-    return new IntrControl(getInstanceName(), cpu);
+    DPRINTF(IntrControl, "Check pending interrupts for CPU %d\n", cpu_id);
+    auto *tc = sys->threads[cpu_id];
+    return tc->getCpuPtr()->checkInterrupts(tc->threadId());
 }
-
-REGISTER_SIM_OBJECT("IntrControl", IntrControl)