inorder cpu: add missing DPRINTF argument

[gem5.git] / src / cpu / legiontrace.hh

diff --git a/src/cpu/legiontrace.hh b/src/cpu/legiontrace.hh
index 19a996ed37147fb364e524c09bf9019a4ec5d8b8..24957e40a1c056e939b24c696c6a5f66dfe3bd49 100644 (file)
--- a/src/cpu/legiontrace.hh
+++ b/src/cpu/legiontrace.hh
@@ -29,13 +29,13 @@
  *          Nathan Binkert
  */
 
-#ifndef __LEGIONTRACE_HH__
-#define __LEGIONTRACE_HH__
+#ifndef __CPU_LEGIONTRACE_HH__
+#define __CPU_LEGIONTRACE_HH__
 
 #include "base/trace.hh"
+#include "base/types.hh"
 #include "cpu/static_inst.hh"
 #include "params/LegionTrace.hh"
-#include "base/types.hh"
 #include "sim/insttracer.hh"
 
 class ThreadContext;
@@ -46,10 +46,10 @@ class LegionTraceRecord : public InstRecord
 {
   public:
     LegionTraceRecord(Tick _when, ThreadContext *_thread,
-               const StaticInstPtr _staticInst, Addr _pc, bool spec,
-               const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
+               const StaticInstPtr _staticInst, TheISA::PCState _pc,
+               bool spec, const StaticInstPtr _macroStaticInst = NULL)
         : InstRecord(_when, _thread, _staticInst, _pc, spec,
-                _macroStaticInst, _upc)
+                _macroStaticInst)
     {
     }
 
@@ -65,17 +65,17 @@ class LegionTrace : public InstTracer
 
     LegionTraceRecord *
     getInstRecord(Tick when, ThreadContext *tc,
-            const StaticInstPtr staticInst, Addr pc,
-            const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0)
+            const StaticInstPtr staticInst, TheISA::PCState pc,
+            const StaticInstPtr macroStaticInst = NULL)
     {
         if (tc->misspeculating())
             return NULL;
 
         return new LegionTraceRecord(when, tc,
-                staticInst, pc, tc->misspeculating(), macroStaticInst, upc);
+                staticInst, pc, tc->misspeculating(), macroStaticInst);
     }
 };
 
-/* namespace Trace */ }
+} // namespace Trace
 
-#endif // __LEGIONTRACE_HH__
+#endif // __CPU_LEGIONTRACE_HH__