use numCycles instead of simTicks to determine CPI stat in InOrder

[gem5.git] / src / cpu / memtest / memtest.cc

diff --git a/src/cpu/memtest/memtest.cc b/src/cpu/memtest/memtest.cc
index f8c8a0547d82bebe4aeea7c9227a5153af2a2722..3c57f85b72f01c1de21507cfcdb208a92b0b552f 100644 (file)
--- a/src/cpu/memtest/memtest.cc
+++ b/src/cpu/memtest/memtest.cc
@@ -39,12 +39,9 @@
 #include "base/misc.hh"
 #include "base/statistics.hh"
 #include "cpu/memtest/memtest.hh"
-//#include "cpu/simple_thread.hh"
-//#include "mem/cache/base_cache.hh"
 #include "mem/mem_object.hh"
 #include "mem/port.hh"
 #include "mem/packet.hh"
-//#include "mem/physical.hh"
 #include "mem/request.hh"
 #include "sim/sim_events.hh"
 #include "sim/stats.hh"
@@ -155,7 +152,7 @@ MemTest::MemTest(const Params *p)
     // set up counters
     noResponseCycles = 0;
     numReads = 0;
-    tickEvent.schedule(0);
+    schedule(tickEvent, 0);
 
     id = TESTER_ALLOCATOR++;
 
@@ -207,9 +204,9 @@ MemTest::completeRequest(PacketPtr pkt)
     assert(removeAddr != outstandingAddrs.end());
     outstandingAddrs.erase(removeAddr);
 
-    switch (pkt->cmd.toInt()) {
-      case MemCmd::ReadResp:
+    assert(pkt->isResponse());
 
+    if (pkt->isRead()) {
         if (memcmp(pkt_data, data, pkt->getSize()) != 0) {
             panic("%s: read of %x (blk %x) @ cycle %d "
                   "returns %x, expected %x\n", name(),
@@ -228,14 +225,9 @@ MemTest::completeRequest(PacketPtr pkt)
 
         if (maxLoads != 0 && numReads >= maxLoads)
             exitSimLoop("maximum number of loads reached");
-        break;
-
-      case MemCmd::WriteResp:
+    } else {
+        assert(pkt->isWrite());
         numWritesStat++;
-        break;
-
-      default:
-        panic("invalid command %s (%d)", pkt->cmdString(), pkt->cmd.toInt());
     }
 
     noResponseCycles = 0;
@@ -270,7 +262,7 @@ void
 MemTest::tick()
 {
     if (!tickEvent.scheduled())
-        tickEvent.schedule(curTick + ticks(1));
+        schedule(tickEvent, curTick + ticks(1));
 
     if (++noResponseCycles >= 500000) {
         cerr << name() << ": deadlocked at cycle " << curTick << endl;
@@ -287,7 +279,7 @@ MemTest::tick()
     unsigned base = random() % 2;
     uint64_t data = random();
     unsigned access_size = random() % 4;
-    unsigned cacheable = random() % 100;
+    bool uncacheable = (random() % 100) < percentUncacheable;
 
     //If we aren't doing copies, use id as offset, and do a false sharing
     //mem tester
@@ -298,17 +290,16 @@ MemTest::tick()
     access_size = 0;
 
     Request *req = new Request();
-    uint32_t flags = 0;
+    Request::Flags flags;
     Addr paddr;
 
-    if (cacheable < percentUncacheable) {
-        flags |= UNCACHEABLE;
+    if (uncacheable) {
+        flags.set(Request::UNCACHEABLE);
         paddr = uncacheAddr + offset;
     } else {
         paddr = ((base) ? baseAddr1 : baseAddr2) + offset;
     }
-    bool probe = (random() % 100 < percentFunctional) && !(flags & UNCACHEABLE);
-    //bool probe = false;
+    bool probe = (random() % 100 < percentFunctional) && !uncacheable;
 
     paddr &= ~((1 << access_size) - 1);
     req->setPhys(paddr, 1 << access_size, flags);
@@ -394,6 +385,14 @@ MemTest::doRetry()
     }
 }
 
+
+void
+MemTest::printAddr(Addr a)
+{
+    cachePort.printAddr(a);
+}
+
+
 MemTest *
 MemTestParams::create()
 {