X86: Add a .serializing directive that makes a macroop serializing.

[gem5.git] / src / cpu / memtest / memtest.hh

diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/memtest/memtest.hh
index eb0c822f1c9b0065c0518d50c551e1e6607656e3..bb71da355dc9b750350df61965119ac4ea6173c0 100644 (file)
--- a/src/cpu/memtest/memtest.hh
+++ b/src/cpu/memtest/memtest.hh
@@ -35,6 +35,7 @@
 #include <set>
 
 #include "base/statistics.hh"
+#include "base/fast_alloc.hh"
 #include "params/MemTest.hh"
 #include "sim/eventq.hh"
 #include "sim/sim_exit.hh"
@@ -62,6 +63,10 @@ class MemTest : public MemObject
 
     virtual Port *getPort(const std::string &if_name, int idx = -1);
 
+    /**
+     * Print state of address in memory system via PrintReq (for
+     * debugging).
+     */
     void printAddr(Addr a);
 
   protected:
@@ -69,11 +74,11 @@ class MemTest : public MemObject
     {
       private:
         MemTest *cpu;
+
       public:
-        TickEvent(MemTest *c)
-            : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) {}
-        void process() {cpu->tick();}
-        virtual const char *description() { return "MemTest tick"; }
+        TickEvent(MemTest *c) : Event(CPU_Tick_Pri), cpu(c) {}
+        void process() { cpu->tick(); }
+        virtual const char *description() const { return "MemTest tick"; }
     };
 
     TickEvent tickEvent;
@@ -112,7 +117,7 @@ class MemTest : public MemObject
 
     bool snoopRangeSent;
 
-    class MemTestSenderState : public Packet::SenderState
+    class MemTestSenderState : public Packet::SenderState, public FastAlloc
     {
       public:
         /** Constructor. */
@@ -127,13 +132,20 @@ class MemTest : public MemObject
     PacketPtr retryPkt;
 
     bool accessRetry;
+    
+    //
+    // The dmaOustanding flag enforces only one dma at a time
+    //
+    bool dmaOutstanding;
 
-    unsigned size;             // size of testing memory region
+    unsigned size;              // size of testing memory region
 
-    unsigned percentReads;     // target percentage of read accesses
-    unsigned percentFunctional;        // target percentage of functional accesses
+    unsigned percentReads;      // target percentage of read accesses
+    unsigned percentFunctional; // target percentage of functional accesses
     unsigned percentUncacheable;
 
+    bool issueDmas;
+
     int id;
 
     std::set<unsigned> outstandingAddrs;
@@ -149,12 +161,12 @@ class MemTest : public MemObject
 
     Addr traceBlockAddr;
 
-    Addr baseAddr1;            // fix this to option
-    Addr baseAddr2;            // fix this to option
+    Addr baseAddr1;             // fix this to option
+    Addr baseAddr2;             // fix this to option
     Addr uncacheAddr;
 
-    unsigned progressInterval; // frequency of progress reports
-    Tick nextProgressMessage;  // access # for next progress report
+    unsigned progressInterval;  // frequency of progress reports
+    Tick nextProgressMessage;   // access # for next progress report
 
     unsigned percentSourceUnaligned;
     unsigned percentDestUnaligned;
@@ -166,9 +178,9 @@ class MemTest : public MemObject
 
     bool atomic;
 
-    Stats::Scalar<> numReadsStat;
-    Stats::Scalar<> numWritesStat;
-    Stats::Scalar<> numCopiesStat;
+    Stats::Scalar numReadsStat;
+    Stats::Scalar numWritesStat;
+    Stats::Scalar numCopiesStat;
 
     // called by MemCompleteEvent::process()
     void completeRequest(PacketPtr pkt);