Fixes to get MIPS_SE to compile.

[gem5.git] / src / cpu / o3 / decode.hh

diff --git a/src/cpu/o3/decode.hh b/src/cpu/o3/decode.hh
index ff88358d6262c904b7ebdca65db8787808c7e2b1..4a845e670626552c8e67b85394aac3d3503e89df 100644 (file)
--- a/src/cpu/o3/decode.hh
+++ b/src/cpu/o3/decode.hh
@@ -48,7 +48,7 @@ class DefaultDecode
 {
   private:
     // Typedefs from the Impl.
-    typedef typename Impl::FullCPU FullCPU;
+    typedef typename Impl::O3CPU O3CPU;
     typedef typename Impl::DynInstPtr DynInstPtr;
     typedef typename Impl::Params Params;
     typedef typename Impl::CPUPol CPUPol;
@@ -95,7 +95,7 @@ class DefaultDecode
     void regStats();
 
     /** Sets CPU pointer. */
-    void setCPU(FullCPU *cpu_ptr);
+    void setCPU(O3CPU *cpu_ptr);
 
     /** Sets the main backwards communication time buffer pointer. */
     void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
@@ -109,8 +109,14 @@ class DefaultDecode
     /** Sets pointer to list of active threads. */
     void setActiveThreads(std::list<unsigned> *at_ptr);
 
+    /** Drains the decode stage. */
+    bool drain();
+
+    /** Resumes execution after a drain. */
+    void resume() { }
+
     /** Switches out the decode stage. */
-    void switchOut();
+    void switchOut() { }
 
     /** Takes over from another CPU's thread. */
     void takeOverFrom();
@@ -189,7 +195,7 @@ class DefaultDecode
   private:
     // Interfaces to objects outside of decode.
     /** CPU interface. */
-    FullCPU *cpu;
+    O3CPU *cpu;
 
     /** Time buffer interface. */
     TimeBuffer<TimeStruct> *timeBuffer;
@@ -270,6 +276,19 @@ class DefaultDecode
     /** Maximum size of the skid buffer. */
     unsigned skidBufferMax;
 
+    /** SeqNum of Squashing Branch Delay Instruction (used for MIPS)*/
+    Addr bdelayDoneSeqNum[Impl::MaxThreads];
+
+    /** Instruction used for squashing branch (used for MIPS)*/
+    DynInstPtr squashInst[Impl::MaxThreads];
+
+    /** Tells when their is a pending delay slot inst. to send
+     *  to rename. If there is, then wait squash after the next
+     *  instruction (used for MIPS).
+     */
+    bool squashAfterDelaySlot[Impl::MaxThreads];
+
+
     /** Stat for total number of idle cycles. */
     Stats::Scalar<> decodeIdleCycles;
     /** Stat for total number of blocked cycles. */