#ifndef __CPU_O3_IEW_HH__
#define __CPU_O3_IEW_HH__
+#include "config/full_system.hh"
+
#include <queue>
#include "base/statistics.hh"
#include "base/timebuf.hh"
-#include "config/full_system.hh"
#include "cpu/o3/comm.hh"
#include "cpu/o3/scoreboard.hh"
#include "cpu/o3/lsq.hh"
public:
/** Constructs a DefaultIEW with the given parameters. */
- DefaultIEW(Params *params);
+ DefaultIEW(O3CPU *_cpu, Params *params);
/** Returns the name of the DefaultIEW stage. */
std::string name() const;
/** Initializes stage; sends back the number of free IQ and LSQ entries. */
void initStage();
- /** Sets CPU pointer for IEW, IQ, and LSQ. */
- void setCPU(O3CPU *cpu_ptr);
+ /** Returns the dcache port. */
+ Port *getDcachePort() { return ldstQueue.getDcachePort(); }
/** Sets main time buffer used for backwards communication. */
void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
if (++wbOutstanding == wbMax)
ableToIssue = false;
DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
-#if DEBUG
+ assert(wbOutstanding <= wbMax);
+#ifdef DEBUG
wbList.insert(sn);
#endif
}
if (wbOutstanding-- == wbMax)
ableToIssue = true;
DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
-#if DEBUG
+ assert(wbOutstanding >= 0);
+#ifdef DEBUG
assert(wbList.find(sn) != wbList.end());
wbList.erase(sn);
#endif
}
-#if DEBUG
+#ifdef DEBUG
std::set<InstSeqNum> wbList;
void dumpWb()
/** Scoreboard pointer. */
Scoreboard* scoreboard;
- public:
- /** Instruction queue. */
- IQ instQueue;
-
- /** Load / store queue. */
- LSQ ldstQueue;
-
- /** Pointer to the functional unit pool. */
- FUPool *fuPool;
-
private:
/** CPU pointer. */
O3CPU *cpu;
void printAvailableInsts();
public:
+ /** Instruction queue. */
+ IQ instQueue;
+
+ /** Load / store queue. */
+ LSQ ldstQueue;
+
+ /** Pointer to the functional unit pool. */
+ FUPool *fuPool;
/** Records if the LSQ needs to be updated on the next cycle, so that
* IEW knows if there will be activity on the next cycle.
*/
/** Records if there is a fetch redirect on this cycle for each thread. */
bool fetchRedirect[Impl::MaxThreads];
- /** Used to track if all instructions have been dispatched this cycle.
- * If they have not, then blocking must have occurred, and the instructions
- * would already be added to the skid buffer.
- * @todo: Fix this hack.
- */
- bool dispatchedAllInsts;
-
/** Records if the queues have been changed (inserted or issued insts),
* so that IEW knows to broadcast the updated amount of free entries.
*/
unsigned wbCycle;
/** Number of instructions in flight that will writeback. */
- unsigned wbOutstanding;
+
+ /** Number of instructions in flight that will writeback. */
+ int wbOutstanding;
/** Writeback width. */
unsigned wbWidth;
Stats::Scalar<> iewExecutedInsts;
/** Stat for total number of executed load instructions. */
Stats::Vector<> iewExecLoadInsts;
+ /** Stat for total number of executed store instructions. */
+// Stats::Scalar<> iewExecStoreInsts;
/** Stat for total number of squashed instructions skipped at execute. */
Stats::Scalar<> iewExecSquashedInsts;
/** Number of executed software prefetches. */