Add in files from merge-bare-iron, get them compiling in FS and SE mode

[gem5.git] / src / cpu / o3 / iew.hh

diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh
index 76fa008eec8ab93dd3605ccc215a7d43a75d68fa..457e2a024bbe237b3938d4dce71f12db9ed3828e 100644 (file)
--- a/src/cpu/o3/iew.hh
+++ b/src/cpu/o3/iew.hh
@@ -115,7 +115,7 @@ class DefaultIEW
 
   public:
     /** Constructs a DefaultIEW with the given parameters. */
-    DefaultIEW(Params *params);
+    DefaultIEW(O3CPU *_cpu, Params *params);
 
     /** Returns the name of the DefaultIEW stage. */
     std::string name() const;
@@ -129,9 +129,6 @@ class DefaultIEW
     /** Returns the dcache port. */
     Port *getDcachePort() { return ldstQueue.getDcachePort(); }
 
-    /** Sets CPU pointer for IEW, IQ, and LSQ. */
-    void setCPU(O3CPU *cpu_ptr);
-
     /** Sets main time buffer used for backwards communication. */
     void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
 
@@ -216,6 +213,7 @@ class DefaultIEW
         if (++wbOutstanding == wbMax)
             ableToIssue = false;
         DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
+        assert(wbOutstanding <= wbMax);
 #ifdef DEBUG
         wbList.insert(sn);
 #endif
@@ -226,6 +224,7 @@ class DefaultIEW
         if (wbOutstanding-- == wbMax)
             ableToIssue = true;
         DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
+        assert(wbOutstanding >= 0);
 #ifdef DEBUG
         assert(wbList.find(sn) != wbList.end());
         wbList.erase(sn);
@@ -365,16 +364,6 @@ class DefaultIEW
     /** Scoreboard pointer. */
     Scoreboard* scoreboard;
 
-  public:
-    /** Instruction queue. */
-    IQ instQueue;
-
-    /** Load / store queue. */
-    LSQ ldstQueue;
-
-    /** Pointer to the functional unit pool. */
-    FUPool *fuPool;
-
   private:
     /** CPU pointer. */
     O3CPU *cpu;
@@ -396,6 +385,14 @@ class DefaultIEW
     void printAvailableInsts();
 
   public:
+    /** Instruction queue. */
+    IQ instQueue;
+
+    /** Load / store queue. */
+    LSQ ldstQueue;
+
+    /** Pointer to the functional unit pool. */
+    FUPool *fuPool;
     /** Records if the LSQ needs to be updated on the next cycle, so that
      * IEW knows if there will be activity on the next cycle.
      */
@@ -405,16 +402,6 @@ class DefaultIEW
     /** Records if there is a fetch redirect on this cycle for each thread. */
     bool fetchRedirect[Impl::MaxThreads];
 
-    /** Keeps track of the last valid branch delay slot instss for threads */
-    InstSeqNum bdelayDoneSeqNum[Impl::MaxThreads];
-
-    /** Used to track if all instructions have been dispatched this cycle.
-     * If they have not, then blocking must have occurred, and the instructions
-     * would already be added to the skid buffer.
-     * @todo: Fix this hack.
-     */
-    bool dispatchedAllInsts;
-
     /** Records if the queues have been changed (inserted or issued insts),
      * so that IEW knows to broadcast the updated amount of free entries.
      */
@@ -450,7 +437,9 @@ class DefaultIEW
     unsigned wbCycle;
 
     /** Number of instructions in flight that will writeback. */
-    unsigned wbOutstanding;
+
+    /** Number of instructions in flight that will writeback. */
+    int wbOutstanding;
 
     /** Writeback width. */
     unsigned wbWidth;
@@ -507,6 +496,8 @@ class DefaultIEW
     Stats::Scalar<> iewExecutedInsts;
     /** Stat for total number of executed load instructions. */
     Stats::Vector<> iewExecLoadInsts;
+    /** Stat for total number of executed store instructions. */
+//    Stats::Scalar<> iewExecStoreInsts;
     /** Stat for total number of squashed instructions skipped at execute. */
     Stats::Scalar<> iewExecSquashedInsts;
     /** Number of executed software prefetches. */